{"id":"https://openalex.org/W4244278326","doi":"https://doi.org/10.1109/iccad.2014.7001354","title":"More effective power-gated circuit optimization with multi-bit retention registers","display_name":"More effective power-gated circuit optimization with multi-bit retention registers","publication_year":2014,"publication_date":"2014-11-01","ids":{"openalex":"https://openalex.org/W4244278326","doi":"https://doi.org/10.1109/iccad.2014.7001354"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2014.7001354","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2014.7001354","pdf_url":null,"source":{"id":"https://openalex.org/S4363608466","display_name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072035695","display_name":"Shu-Hung Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Shu-Hung Lin","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020643571","display_name":"Mark Po-Hung Lin","orcid":"https://orcid.org/0000-0003-2292-2308"},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Mark Po-Hung Lin","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5072035695"],"corresponding_institution_ids":["https://openalex.org/I148099254"],"apc_list":null,"apc_paid":null,"fwci":0.7802,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.71710388,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"19","issue":null,"first_page":"213","last_page":"217"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7404554486274719},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.614617645740509},{"id":"https://openalex.org/keywords/heuristics","display_name":"Heuristics","score":0.5787583589553833},{"id":"https://openalex.org/keywords/data-retention","display_name":"Data retention","score":0.5780616402626038},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.5408198833465576},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.5231232047080994},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5093191862106323},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.5058295726776123},{"id":"https://openalex.org/keywords/sleep-mode","display_name":"Sleep mode","score":0.47574660181999207},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4606402516365051},{"id":"https://openalex.org/keywords/dynamic-programming","display_name":"Dynamic programming","score":0.4262567460536957},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4172079563140869},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35397934913635254},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3186435103416443},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.2810048460960388},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.18311595916748047},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16752126812934875},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11086317896842957},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10568588972091675},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.09456747770309448}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7404554486274719},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.614617645740509},{"id":"https://openalex.org/C127705205","wikidata":"https://www.wikidata.org/wiki/Q5748245","display_name":"Heuristics","level":2,"score":0.5787583589553833},{"id":"https://openalex.org/C2780866740","wikidata":"https://www.wikidata.org/wiki/Q5227345","display_name":"Data retention","level":2,"score":0.5780616402626038},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.5408198833465576},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.5231232047080994},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5093191862106323},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.5058295726776123},{"id":"https://openalex.org/C57149124","wikidata":"https://www.wikidata.org/wiki/Q587346","display_name":"Sleep mode","level":4,"score":0.47574660181999207},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4606402516365051},{"id":"https://openalex.org/C37404715","wikidata":"https://www.wikidata.org/wiki/Q380679","display_name":"Dynamic programming","level":2,"score":0.4262567460536957},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4172079563140869},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35397934913635254},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3186435103416443},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.2810048460960388},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.18311595916748047},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16752126812934875},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11086317896842957},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10568588972091675},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.09456747770309448},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.2014.7001354","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2014.7001354","pdf_url":null,"source":{"id":"https://openalex.org/S4363608466","display_name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8299999833106995,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1582019256","https://openalex.org/W2023871623","https://openalex.org/W2062395401","https://openalex.org/W2074176969","https://openalex.org/W2086775835","https://openalex.org/W2108161550","https://openalex.org/W2121557786","https://openalex.org/W2138099459","https://openalex.org/W2148545775","https://openalex.org/W4233764310","https://openalex.org/W6680358862"],"related_works":["https://openalex.org/W2184321560","https://openalex.org/W2169576692","https://openalex.org/W2068407451","https://openalex.org/W2788692347","https://openalex.org/W2769405015","https://openalex.org/W3090268737","https://openalex.org/W2577492278","https://openalex.org/W1808420522","https://openalex.org/W2560888280","https://openalex.org/W4245803511"],"abstract_inverted_index":{"Applying":[0],"retention":[1,35,45,98],"registers":[2,46],"is":[3],"one":[4],"of":[5,24,92,121],"the":[6,20,51,64,89,102,129,142],"most":[7],"effective":[8,111],"and":[9,54,60,82],"efficient":[10],"approaches":[11],"to":[12,136],"keep":[13],"flip-flop":[14,27,87],"states":[15],"in":[16,28],"power-gated":[17,30,72],"circuits":[18],"during":[19],"sleep":[21],"mode.":[22],"Instead":[23],"replacing":[25],"each":[26],"a":[29,33,86,96],"circuit":[31,73],"with":[32,75,95,118,141],"single-bit":[34],"register":[36],"(SBRR),":[37],"recent":[38],"research":[39],"has":[40],"shown":[41],"that":[42,128],"applying":[43],"multi-bit":[44],"(MBRRs)":[47],"can":[48,132],"effectively":[49],"reduce":[50,134],"storage":[52,138],"size,":[53],"hence":[55],"save":[56],"more":[57,110],"chip":[58],"area":[59],"leakage":[61],"power.":[62],"However,":[63],"previous":[65,103,143],"work":[66],"simply":[67],"adopted":[68],"greedy":[69],"heuristics":[70],"for":[71],"optimization":[74],"MBRRs,":[76],"which":[77],"first":[78],"break":[79],"feedback":[80,123],"paths":[81,94],"then":[83],"iteratively":[84],"replace":[85],"covering":[88],"maximum":[90],"number":[91],"(k-1)-link":[93],"k-bit":[97],"register.":[99],"Different":[100],"from":[101],"work,":[104],"this":[105],"paper":[106],"presents":[107],"an":[108],"even":[109],"approach":[112,131],"based":[113],"on":[114],"integer-linear-programming":[115],"(ILP)":[116],"formulation":[117],"simultaneous":[119],"consideration":[120],"all":[122],"paths.":[124],"Experimental":[125],"results":[126],"show":[127],"proposed":[130],"further":[133],"up":[135],"46%":[137],"size":[139],"compared":[140],"work.":[144]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
