{"id":"https://openalex.org/W4244790824","doi":"https://doi.org/10.1109/iccad.2010.5653698","title":"Recent research development in flip-chip routing","display_name":"Recent research development in flip-chip routing","publication_year":2010,"publication_date":"2010-11-01","ids":{"openalex":"https://openalex.org/W4244790824","doi":"https://doi.org/10.1109/iccad.2010.5653698"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2010.5653698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2010.5653698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009278096","display_name":"Hsu-Chieh Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Hsu-Chieh Lee","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018371636","display_name":"Yao\u2010Wen Chang","orcid":"https://orcid.org/0000-0002-0564-5719"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yao-Wen Chang","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064762205","display_name":"Po-Wei Lee","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Po-Wei Lee","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5009278096"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.5872,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.75329428,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"404","last_page":"410"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/flip-chip","display_name":"Flip chip","score":0.8739520311355591},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6804934740066528},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5307276844978333},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.48820760846138},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.468910813331604},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4416337311267853},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3937908709049225},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2856316566467285},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.27645182609558105},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.2673323452472687},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.19888657331466675},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.1668032705783844},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15783876180648804},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.07204905152320862}],"concepts":[{"id":"https://openalex.org/C79072407","wikidata":"https://www.wikidata.org/wiki/Q432439","display_name":"Flip chip","level":4,"score":0.8739520311355591},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6804934740066528},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5307276844978333},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.48820760846138},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.468910813331604},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4416337311267853},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3937908709049225},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2856316566467285},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.27645182609558105},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.2673323452472687},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.19888657331466675},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.1668032705783844},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15783876180648804},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.07204905152320862},{"id":"https://openalex.org/C68928338","wikidata":"https://www.wikidata.org/wiki/Q131790","display_name":"Adhesive","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.2010.5653698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2010.5653698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1985647466","https://openalex.org/W1997205369","https://openalex.org/W2113046208","https://openalex.org/W2138421468","https://openalex.org/W2140411614","https://openalex.org/W2144672268","https://openalex.org/W2147776496","https://openalex.org/W2149534902","https://openalex.org/W2165838313","https://openalex.org/W4213060235","https://openalex.org/W4231339740","https://openalex.org/W4240977383","https://openalex.org/W4246219036","https://openalex.org/W4255120650","https://openalex.org/W4255799376","https://openalex.org/W6657698678","https://openalex.org/W6672945649"],"related_works":["https://openalex.org/W2350159546","https://openalex.org/W2915158639","https://openalex.org/W1530391261","https://openalex.org/W4211121654","https://openalex.org/W2115932404","https://openalex.org/W4232272518","https://openalex.org/W2261056475","https://openalex.org/W2151795613","https://openalex.org/W2108950548","https://openalex.org/W2545693558"],"abstract_inverted_index":{"The":[0],"flip-chip":[1,76,85,99,119],"package":[2,47],"is":[3,30,51],"introduced":[4,31],"for":[5,98,116],"modern":[6,118],"IC":[7],"designs":[8],"with":[9,101],"higher":[10],"integration":[11],"density,":[12],"larger":[13],"I/O":[14,60],"counts,":[15],"faster":[16],"speed,":[17],"better":[18],"signal":[19],"integrity,":[20],"etc.":[21],"To":[22],"ease":[23],"design":[24,66],"changes,":[25],"an":[26],"extra":[27],"metal":[28],"layer":[29],"to":[32,103],"redistribute":[33],"nets":[34,57],"between":[35,58],"wire-bonding":[36],"(I/O)":[37],"pads":[38,44],"in":[39,45,75],"a":[40,46,72],"die":[41],"and":[42,55,61,90,106,110],"bump":[43,62],"carrier.":[48],"Flipchip":[49],"routing":[50,69,92,100,120],"performed":[52],"by":[53],"redistributing":[54],"interconnecting":[56],"the":[59,65,117],"pads.":[63],"As":[64],"complexity":[67],"grows,":[68],"has":[70],"played":[71],"pivotal":[73],"role":[74],"design.":[77],"In":[78],"this":[79],"paper,":[80],"we":[81],"first":[82],"introduce":[83],"popular":[84],"structures,":[86],"their":[87],"routing-region":[88],"modeling,":[89],"induced":[91],"problems,":[93],"survey":[94],"key":[95],"published":[96],"techniques":[97],"respect":[102],"specific":[104],"structures":[105],"pad":[107],"assignment":[108],"methods,":[109],"provide":[111],"some":[112],"future":[113],"research":[114],"directions":[115],"problem.":[121]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}