{"id":"https://openalex.org/W3144072891","doi":"https://doi.org/10.1109/iccad.2008.4681638","title":"A low-overhead fault tolerance scheme for TSV-based 3D network on chip links","display_name":"A low-overhead fault tolerance scheme for TSV-based 3D network on chip links","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W3144072891","doi":"https://doi.org/10.1109/iccad.2008.4681638","mag":"3144072891"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2008.4681638","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2008.4681638","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE/ACM International Conference on Computer-Aided Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046255006","display_name":"Igor Loi","orcid":"https://orcid.org/0000-0003-3852-4662"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Igor Loi","raw_affiliation_strings":["DEIS, University of Bologna, Bologna, Italy"],"affiliations":[{"raw_affiliation_string":"DEIS, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036312663","display_name":"Subhasish Mitra","orcid":"https://orcid.org/0000-0002-5572-5194"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subhasish Mitra","raw_affiliation_strings":["University of Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102823919","display_name":"Thomas H. Lee","orcid":"https://orcid.org/0000-0003-0635-2990"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Thomas H. Lee","raw_affiliation_strings":["University of Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"University of Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111734510","display_name":"Shinobu Fujita","orcid":null},"institutions":[{"id":"https://openalex.org/I1292669757","display_name":"Toshiba (Japan)","ror":"https://ror.org/0326v3z14","country_code":"JP","type":"company","lineage":["https://openalex.org/I1292669757"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Shinobu Fujita","raw_affiliation_strings":["Toshiba, San Jose College, Japan"],"affiliations":[{"raw_affiliation_string":"Toshiba, San Jose College, Japan","institution_ids":["https://openalex.org/I1292669757"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043408422","display_name":"Luca Benini","orcid":"https://orcid.org/0000-0001-8068-3806"},"institutions":[{"id":"https://openalex.org/I9360294","display_name":"University of Bologna","ror":"https://ror.org/01111rn36","country_code":"IT","type":"education","lineage":["https://openalex.org/I9360294"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Benini","raw_affiliation_strings":["DEIS, University of Bologna, Bologna, Italy"],"affiliations":[{"raw_affiliation_string":"DEIS, University of Bologna, Bologna, Italy","institution_ids":["https://openalex.org/I9360294"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5046255006"],"corresponding_institution_ids":["https://openalex.org/I9360294"],"apc_list":null,"apc_paid":null,"fwci":13.5647,"has_fulltext":false,"cited_by_count":146,"citation_normalized_percentile":{"value":0.98984209,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"598","last_page":"602"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9876999855041504,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.7449584603309631},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.599436342716217},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.5687117576599121},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.5586985349655151},{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.5412406921386719},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.5374157428741455},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5319901704788208},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5168192982673645},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.49091511964797974},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4656584560871124},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4650173485279083},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4632400870323181},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43936723470687866},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4352661371231079},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.31963488459587097},{"id":"https://openalex.org/keywords/silicon","display_name":"Silicon","score":0.27303647994995117},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.21710923314094543},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.19972804188728333},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.181880384683609},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17744269967079163},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.09606680274009705},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.08605080842971802}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.7449584603309631},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.599436342716217},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.5687117576599121},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.5586985349655151},{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.5412406921386719},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.5374157428741455},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5319901704788208},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5168192982673645},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.49091511964797974},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4656584560871124},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4650173485279083},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4632400870323181},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43936723470687866},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4352661371231079},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31963488459587097},{"id":"https://openalex.org/C544956773","wikidata":"https://www.wikidata.org/wiki/Q670","display_name":"Silicon","level":2,"score":0.27303647994995117},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.21710923314094543},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.19972804188728333},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.181880384683609},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17744269967079163},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.09606680274009705},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.08605080842971802},{"id":"https://openalex.org/C46141821","wikidata":"https://www.wikidata.org/wiki/Q209402","display_name":"Nuclear magnetic resonance","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.2008.4681638","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2008.4681638","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE/ACM International Conference on Computer-Aided Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320323553","display_name":"Universit\u00e0 di Bologna","ror":"https://ror.org/01111rn36"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1963792469","https://openalex.org/W2014189044","https://openalex.org/W2059744058","https://openalex.org/W2059808466","https://openalex.org/W2060406579","https://openalex.org/W2071003187","https://openalex.org/W2106537813","https://openalex.org/W2120821227","https://openalex.org/W2123184444","https://openalex.org/W2137893918","https://openalex.org/W2151582312","https://openalex.org/W2160642395","https://openalex.org/W2545026103","https://openalex.org/W3034534532","https://openalex.org/W3140430354"],"related_works":["https://openalex.org/W2027159884","https://openalex.org/W1990828594","https://openalex.org/W2158463942","https://openalex.org/W2089377260","https://openalex.org/W2549021975","https://openalex.org/W2046139226","https://openalex.org/W2333804548","https://openalex.org/W2513353273","https://openalex.org/W2535331497","https://openalex.org/W2040486315"],"abstract_inverted_index":{"Three-dimensional":[0],"die":[1,48],"stacking":[2],"integration":[3],"provides":[4],"the":[5,114],"ability":[6],"to":[7,32,92],"stack":[8,37],"multiple":[9],"layers":[10],"of":[11,18,46,54,72,125],"processed":[12],"silicon":[13],"with":[14,50,94,122],"a":[15,26,51,59,95,101,105,110],"large":[16,52],"number":[17,53],"vertical":[19,102],"interconnects.":[20],"Through":[21],"Silicon":[22],"Vias":[23],"(TSVs)":[24],"provide":[25],"promising":[27],"area-":[28],"and":[29,69,128],"power-efficient":[30],"way":[31],"support":[33],"communication":[34],"between":[35],"different":[36],"layers.":[38],"Unfortunately,":[39],"low":[40,96],"TSV":[41],"yield":[42,88],"significantly":[43],"impacts":[44],"design":[45,127],"three-dimensional":[47,80],"stacks":[49],"TSVs.":[55],"This":[56,74],"paper":[57],"presents":[58],"defect-tolerance":[60],"technique":[61,75],"for":[62,79],"TSVs-based":[63],"multi-bit":[64],"links":[65],"through":[66],"an":[67],"efficient":[68],"effective":[70],"use":[71],"redundancy.":[73],"is":[76],"ideally":[77],"suited":[78],"network-on-chip":[81],"(NoC)":[82],"links.":[83],"Simulation":[84],"results":[85],"demonstrate":[86],"significant":[87],"improvement,":[89],"from":[90],"66%":[91],"98%,":[93],"area":[97],"cost":[98],"(17%":[99],"on":[100],"link":[103],"in":[104,118],"NoC":[106],"switch,":[107],"which":[108],"leads":[109],"modest":[111],"2.1%":[112],"increase":[113],"total":[115],"switch":[116],"area)":[117],"130":[119],"nm":[120],"technology,":[121],"minimal":[123],"impact":[124],"VLSI":[126],"test":[129],"flows.":[130]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":8},{"year":2018,"cited_by_count":9},{"year":2017,"cited_by_count":9},{"year":2016,"cited_by_count":9},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":12},{"year":2013,"cited_by_count":13},{"year":2012,"cited_by_count":21}],"updated_date":"2026-02-25T23:00:34.991745","created_date":"2025-10-10T00:00:00"}