{"id":"https://openalex.org/W4229624828","doi":"https://doi.org/10.1109/iccad.2008.4681569","title":"Simultaneous control of power/ground current, wakeup time and transistor overhead in power gated circuits","display_name":"Simultaneous control of power/ground current, wakeup time and transistor overhead in power gated circuits","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W4229624828","doi":"https://doi.org/10.1109/iccad.2008.4681569"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2008.4681569","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2008.4681569","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE/ACM International Conference on Computer-Aided Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100777156","display_name":"Yongho Lee","orcid":"https://orcid.org/0000-0001-5042-6104"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":true,"raw_author_name":"Yongho Lee","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Seoul National University, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Seoul National University, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008010401","display_name":"Deog\u2010Kyoon Jeong","orcid":"https://orcid.org/0000-0003-0436-703X"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Deog-Kyoon Jeong","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Seoul National University, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Seoul National University, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101736516","display_name":"Taewhan Kim","orcid":"https://orcid.org/0000-0003-2376-4970"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Taewhan Kim","raw_affiliation_strings":["School of Electrical Engineering and Computer Science, Seoul National University, South Korea"],"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering and Computer Science, Seoul National University, South Korea","institution_ids":["https://openalex.org/I139264467"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100777156"],"corresponding_institution_ids":["https://openalex.org/I139264467"],"apc_list":null,"apc_paid":null,"fwci":1.14082865,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.83103192,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"169","last_page":"172"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.7728656530380249},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.730713427066803},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6099219918251038},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5808650255203247},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.5405690670013428},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5329274535179138},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.50847327709198},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.4159315228462219},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3927486538887024},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37686342000961304},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.261075496673584},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2304450273513794},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19763672351837158}],"concepts":[{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.7728656530380249},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.730713427066803},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6099219918251038},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5808650255203247},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.5405690670013428},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5329274535179138},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.50847327709198},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.4159315228462219},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3927486538887024},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37686342000961304},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.261075496673584},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2304450273513794},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19763672351837158},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.2008.4681569","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2008.4681569","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE/ACM International Conference on Computer-Aided Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8399999737739563,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2038501600","https://openalex.org/W2063747323","https://openalex.org/W2126693329","https://openalex.org/W2131554884","https://openalex.org/W4246982917","https://openalex.org/W6666553449","https://openalex.org/W6678797189"],"related_works":["https://openalex.org/W2138099459","https://openalex.org/W2339195741","https://openalex.org/W1965635593","https://openalex.org/W4210367193","https://openalex.org/W2140707386","https://openalex.org/W4249785026","https://openalex.org/W2041557219","https://openalex.org/W2133075121","https://openalex.org/W2113682982","https://openalex.org/W2984119185"],"abstract_inverted_index":{"Power":[0],"gating":[1],"in":[2,33],"circuits":[3],"is":[4,132,138],"one":[5],"of":[6,58,64,93,116,122,153],"the":[7,25,28,38,45,56,62,67,73,86,91,110,114,120,142,166,169],"effective":[8],"technologies":[9],"to":[10,21,48,72,84,108,140,165],"allow":[11],"low":[12],"leakage":[13],"and":[14,23,54,80,96,99,104,119,156],"high":[15],"performance":[16],"operations.":[17],"This":[18],"work":[19],"aims":[20],"analyze":[22],"establish":[24],"relations":[26,65],"between":[27,66],"three":[29],"important":[30],"design":[31],"parameters":[32],"power":[34],"gated":[35],"circuits:":[36],"(i)":[37],"maximum":[39],"current":[40,98,118],"flowing":[41],"from/to":[42],"power/ground":[43],"(ii)":[44],"wakeup":[46,82,94,106,111,161],"(sleep":[47],"active":[49],"mode":[50],"transition)":[51],"time":[52,95,112,162],"delay":[53],"(iii)":[55],"number":[57,121,152],"sleep":[59,87,123,154],"transistors.":[60,124],"With":[61],"understanding":[63],"parameters,":[68],"we":[69],"propose":[70],"solutions":[71,146],"two":[74],"problems:":[75],"(1)":[76],"finding":[77,101,145],"logic":[78,102],"clusters":[79,103],"their":[81,105],"schedule":[83,107],"minimize":[85,109],"transistor":[88],"overhead":[89],"under":[90,113],"constraints":[92,115],"peak":[97,117],"(2)":[100],"From":[125],"an":[126],"experimentation":[127],"using":[128],"ISCAS":[129],"benchmarks,":[130],"it":[131],"shown":[133],"that":[134],"our":[135],"proposed":[136],"technique":[137],"able":[139],"explore":[141],"search":[143],"space,":[144],"with":[147],"65%":[148],"\u223c":[149,158],"77%":[150],"reduced":[151,160],"transistors":[155],"30%":[157],"36%":[159],"delay,":[163],"compared":[164],"results":[167],"by":[168],"previous":[170],"work.":[171]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}