{"id":"https://openalex.org/W1905608265","doi":"https://doi.org/10.1109/iccad.2004.1382677","title":"DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs","display_name":"DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs","publication_year":2005,"publication_date":"2005-02-22","ids":{"openalex":"https://openalex.org/W1905608265","doi":"https://doi.org/10.1109/iccad.2004.1382677","mag":"1905608265"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2004.1382677","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2004.1382677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039275102","display_name":"D. Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"D. Chen","raw_affiliation_strings":["Computer Science Department, University of California, Los Angeles, USA","Dept. of comput. Sci., California Univ., Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science Department, University of California, Los Angeles, USA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"Dept. of comput. Sci., California Univ., Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078536348","display_name":"J. Cong","orcid":"https://orcid.org/0000-0003-3526-499X"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Cong","raw_affiliation_strings":["Computer Science Department, University of California, Los Angeles, USA","Dept. of comput. Sci., California Univ., Los Angeles, CA, USA"],"affiliations":[{"raw_affiliation_string":"Computer Science Department, University of California, Los Angeles, USA","institution_ids":["https://openalex.org/I161318765"]},{"raw_affiliation_string":"Dept. of comput. Sci., California Univ., Los Angeles, CA, USA","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5039275102"],"corresponding_institution_ids":["https://openalex.org/I161318765"],"apc_list":null,"apc_paid":null,"fwci":20.6772,"has_fulltext":false,"cited_by_count":166,"citation_normalized_percentile":{"value":0.99616828,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.720415472984314},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7059440016746521},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5704189538955688},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.5407739877700806},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.5356511473655701},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.5069949626922607},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.4785369336605072},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.4375498294830322},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.4118335247039795},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35807108879089355},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.17644724249839783},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.12490183115005493},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10595512390136719}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.720415472984314},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7059440016746521},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5704189538955688},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.5407739877700806},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.5356511473655701},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.5069949626922607},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.4785369336605072},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.4375498294830322},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4118335247039795},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35807108879089355},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.17644724249839783},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.12490183115005493},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10595512390136719},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/iccad.2004.1382677","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2004.1382677","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.130.1038","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.130.1038","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://ieeexplore.ieee.org/iel5/9494/30133/01382677.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.78.7586","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.78.7586","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://ballade.cs.ucla.edu/~cong/papers/CRU79_chen.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W1480203124","https://openalex.org/W1806428288","https://openalex.org/W1936695334","https://openalex.org/W1978998136","https://openalex.org/W1985457698","https://openalex.org/W1990261461","https://openalex.org/W2017344487","https://openalex.org/W2021709993","https://openalex.org/W2069508824","https://openalex.org/W2072740520","https://openalex.org/W2101356024","https://openalex.org/W2101952163","https://openalex.org/W2105715355","https://openalex.org/W2108539060","https://openalex.org/W2108914609","https://openalex.org/W2112557094","https://openalex.org/W2116677904","https://openalex.org/W2132225593","https://openalex.org/W2137806747","https://openalex.org/W2156366819","https://openalex.org/W2159352256","https://openalex.org/W2160671668","https://openalex.org/W2167328871","https://openalex.org/W2171775842","https://openalex.org/W3141004699","https://openalex.org/W4237405987","https://openalex.org/W4241249008","https://openalex.org/W4251989506","https://openalex.org/W4252217915","https://openalex.org/W6638218184","https://openalex.org/W6834495128"],"related_works":["https://openalex.org/W2798215405","https://openalex.org/W2990962948","https://openalex.org/W2111241003","https://openalex.org/W2084169748","https://openalex.org/W4200391368","https://openalex.org/W2117300767","https://openalex.org/W2024574431","https://openalex.org/W2374017528","https://openalex.org/W4285503609","https://openalex.org/W2126248441"],"abstract_inverted_index":{"In":[0],"This":[1,33,47],"work":[2,48],"we":[3,53,85],"study":[4],"the":[5,17,25,29,55,60,65,70,73,80,88,93,121,134,155],"technology":[6],"mapping":[7,66,105,131,143,160,183],"problem":[8],"for":[9,198],"FPGA":[10],"architectures":[11],"to":[12,103,124,154,184],"minimize":[13,104],"chip":[14,30],"area,":[15],"or":[16],"total":[18],"number":[19],"of":[20,24,46,188,192],"lookup":[21],"tables":[22],"(LUTs)":[23],"mapped":[26],"design,":[27],"under":[28,133],"performance":[31],"constraint.":[32],"is":[34,83,113,168],"a":[35,39],"well-studied":[36],"topic":[37],"and":[38,99,119,150,164,173],"very":[40],"difficult":[41],"task":[42],"(NP-hard).":[43],"The":[44],"contributions":[45],"are":[49,182,195],"as":[50],"follows:":[51],"(i)":[52],"consider":[54],"potential":[56],"node":[57],"duplications":[58],"during":[59],"cut":[61,110],"enumeration/generation":[62],"procedure":[63,112],"so":[64],"costs":[67],"encoded":[68],"in":[69],"cuts":[71],"drive":[72],"area-optimization":[74],"objective":[75],"more":[76],"effectively;":[77],"(ii)":[78],"after":[79],"timing":[81],"constraint":[82],"determined,":[84],"will":[86],"relax":[87],"non-critical":[89],"paths":[90],"by":[91],"searching":[92],"solution":[94,122,126],"space":[95,123],"considering":[96],"both":[97,180],"local":[98],"global":[100],"optimality":[101],"information":[102],"area;":[106],"(iii)":[107],"an":[108],"iterative":[109],"selection":[111],"carried":[114],"out":[115],"that":[116,141],"further":[117],"explores":[118],"perturbs":[120],"improve":[125],"quality.":[127],"We":[128],"guarantee":[129],"optimal":[130],"depth":[132],"unit":[135],"delay":[136],"model.":[137],"Experimental":[138],"results":[139],"show":[140],"our":[142],"algorithm,":[144],"named":[145],"DAOmap,":[146],"produces":[147],"significant":[148],"quality":[149],"runtime":[151],"improvements.":[152],"Compared":[153],"state-of-the-art":[156],"depth-optimal,":[157],"area":[158,172],"minimization":[159],"algorithm":[161],"CutMap":[162],"(Cong":[163],"Hwan,":[165],"1995),":[166],"DAOmap":[167],"16.02%":[169],"better":[170],"on":[171,177],"runs":[174],"24.2X":[175],"faster":[176],"average":[178],"when":[179],"algorithms":[181],"FPGAs":[185],"using":[186],"LUTs":[187,191],"five":[189],"inputs.":[190],"other":[193],"inputs":[194],"also":[196],"used":[197],"comparisons.":[199]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":8},{"year":2023,"cited_by_count":5},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":11},{"year":2017,"cited_by_count":10},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":9},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":4}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
