{"id":"https://openalex.org/W1607338936","doi":"https://doi.org/10.1109/iccad.2004.1382549","title":"Fast simulation of VLSI interconnects","display_name":"Fast simulation of VLSI interconnects","publication_year":2005,"publication_date":"2005-02-22","ids":{"openalex":"https://openalex.org/W1607338936","doi":"https://doi.org/10.1109/iccad.2004.1382549","mag":"1607338936"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2004.1382549","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2004.1382549","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101535316","display_name":"Jitesh Jain","orcid":"https://orcid.org/0000-0003-0638-0633"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"J. Jain","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110204557","display_name":"Cheng\u2010Kok Koh","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cheng-Kok Koh","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022664058","display_name":"V. Balakrishnan","orcid":"https://orcid.org/0000-0001-9284-2202"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"V. Balakrishnan","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101535316"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":2.5393,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.88729491,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"93","last_page":"98"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8874120712280273},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.8324568271636963},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7504529356956482},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6989699602127075},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5528952479362488},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5353899598121643},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47325757145881653},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4555266499519348},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.37197303771972656},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.35600271821022034},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23948204517364502},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1801244020462036},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11882850527763367},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0659647285938263}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8874120712280273},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.8324568271636963},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7504529356956482},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6989699602127075},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5528952479362488},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5353899598121643},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47325757145881653},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4555266499519348},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.37197303771972656},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.35600271821022034},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23948204517364502},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1801244020462036},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11882850527763367},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0659647285938263},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iccad.2004.1382549","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2004.1382549","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.452.9218","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.452.9218","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.york.ac.uk/rts/docs/SIGDA-Compendium-1994-2004/papers/2004/iccad04/pdffiles/01d_4.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306101","display_name":"National Aeronautics and Space Administration","ror":"https://ror.org/027ka1x80"},{"id":"https://openalex.org/F4320322670","display_name":"Tehran University of Medical Sciences and Health Services","ror":"https://ror.org/01c4pz451"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1597944220","https://openalex.org/W2061503856","https://openalex.org/W2075891646","https://openalex.org/W2128004834","https://openalex.org/W2131132258","https://openalex.org/W2132934800","https://openalex.org/W2153794074","https://openalex.org/W2154941678","https://openalex.org/W2166800872","https://openalex.org/W2724336187","https://openalex.org/W4237819149","https://openalex.org/W4238115498","https://openalex.org/W4245113108","https://openalex.org/W4252261125","https://openalex.org/W4256402224","https://openalex.org/W6679847984","https://openalex.org/W6833877053"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W3135165657","https://openalex.org/W1485582195","https://openalex.org/W57337972","https://openalex.org/W2081032080","https://openalex.org/W2134733504","https://openalex.org/W2144460576"],"abstract_inverted_index":{"This":[0],"work":[1],"introduces":[2],"an":[3],"efficient":[4],"and":[5,56],"accurate":[6],"interconnect":[7,16],"simulation":[8,40,76],"technique.":[9],"A":[10],"new":[11],"formulation":[12],"for":[13,35],"typical":[14],"VLSI":[15],"structures":[17],"is":[18],"proposed":[19],"which,":[20],"in":[21,53,61],"addition":[22],"to":[23,66],"providing":[24],"a":[25,33],"compact":[26],"set":[27],"of":[28],"modeling":[29],"equations,":[30],"also":[31],"offers":[32],"potential":[34],"exploiting":[36],"sparsity":[37],"at":[38],"the":[39],"level.":[41],"Simulations":[42],"show":[43],"that":[44],"our":[45],"approach":[46],"can":[47],"achieve":[48],"50":[49],"/spl":[50,69],"times/":[51,70],"improvement":[52],"computation":[54],"time":[55],"memory":[57],"over":[58],"INDUCTWISE":[59],"(which":[60],"turn":[62],"has":[63],"been":[64],"shown":[65],"be":[67],"400":[68],"faster":[71],"than":[72],"SPICE)":[73],"while":[74],"preserving":[75],"accuracy.":[77]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}