{"id":"https://openalex.org/W2151215675","doi":"https://doi.org/10.1109/icassp.2004.1327082","title":"An efficient buffer-based architecture for on-line computation of 1-D discrete wavelet transform","display_name":"An efficient buffer-based architecture for on-line computation of 1-D discrete wavelet transform","publication_year":2004,"publication_date":"2004-09-28","ids":{"openalex":"https://openalex.org/W2151215675","doi":"https://doi.org/10.1109/icassp.2004.1327082","mag":"2151215675"},"language":"en","primary_location":{"id":"doi:10.1109/icassp.2004.1327082","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.2004.1327082","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101539873","display_name":"Chengjun Zhang","orcid":"https://orcid.org/0000-0002-0518-5409"},"institutions":[{"id":"https://openalex.org/I60158472","display_name":"Concordia University","ror":"https://ror.org/0420zvk78","country_code":"CA","type":"education","lineage":["https://openalex.org/I60158472"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Chengjun Zhang","raw_affiliation_strings":["Center for Signal Processing and Communications, Department of Electrical and Computer Engineering, Concordia University, Montreal, QUE, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Signal Processing and Communications, Department of Electrical and Computer Engineering, Concordia University, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I60158472"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100451076","display_name":"Chunyan Wang","orcid":"https://orcid.org/0000-0002-4594-8378"},"institutions":[{"id":"https://openalex.org/I60158472","display_name":"Concordia University","ror":"https://ror.org/0420zvk78","country_code":"CA","type":"education","lineage":["https://openalex.org/I60158472"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Chunyan Wang","raw_affiliation_strings":["Center for Signal Processing and Communications, Department of Electrical and Computer Engineering, Concordia University, Montreal, QUE, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Signal Processing and Communications, Department of Electrical and Computer Engineering, Concordia University, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I60158472"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068820891","display_name":"M. Omair Ahmad","orcid":"https://orcid.org/0000-0002-2924-6659"},"institutions":[{"id":"https://openalex.org/I60158472","display_name":"Concordia University","ror":"https://ror.org/0420zvk78","country_code":"CA","type":"education","lineage":["https://openalex.org/I60158472"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"M.O. Ahmad","raw_affiliation_strings":["Center for Signal Processing and Communications, Department of Electrical and Computer Engineering, Concordia University, Montreal, QUE, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Signal Processing and Communications, Department of Electrical and Computer Engineering, Concordia University, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I60158472"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I60158472"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"5","issue":null,"first_page":"V","last_page":"201"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7442659139633179},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6326809525489807},{"id":"https://openalex.org/keywords/discrete-wavelet-transform","display_name":"Discrete wavelet transform","score":0.6285194158554077},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.5638552904129028},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.5182216763496399},{"id":"https://openalex.org/keywords/wavelet-transform","display_name":"Wavelet transform","score":0.48833081126213074},{"id":"https://openalex.org/keywords/second-generation-wavelet-transform","display_name":"Second-generation wavelet transform","score":0.4803239405155182},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4420194625854492},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.4299442172050476},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.4164290428161621},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3490578234195709},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.34159642457962036},{"id":"https://openalex.org/keywords/wavelet","display_name":"Wavelet","score":0.32583051919937134},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.19394239783287048},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.15896734595298767},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13481470942497253},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.08198708295822144},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.0773303210735321}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7442659139633179},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6326809525489807},{"id":"https://openalex.org/C46286280","wikidata":"https://www.wikidata.org/wiki/Q2414958","display_name":"Discrete wavelet transform","level":4,"score":0.6285194158554077},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.5638552904129028},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.5182216763496399},{"id":"https://openalex.org/C196216189","wikidata":"https://www.wikidata.org/wiki/Q2867","display_name":"Wavelet transform","level":3,"score":0.48833081126213074},{"id":"https://openalex.org/C111350171","wikidata":"https://www.wikidata.org/wiki/Q7443700","display_name":"Second-generation wavelet transform","level":5,"score":0.4803239405155182},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4420194625854492},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.4299442172050476},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.4164290428161621},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3490578234195709},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.34159642457962036},{"id":"https://openalex.org/C47432892","wikidata":"https://www.wikidata.org/wiki/Q831390","display_name":"Wavelet","level":2,"score":0.32583051919937134},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.19394239783287048},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.15896734595298767},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13481470942497253},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.08198708295822144},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0773303210735321},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icassp.2004.1327082","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.2004.1327082","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2004 IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1565971030","https://openalex.org/W1981173447","https://openalex.org/W2030266057","https://openalex.org/W2122819695","https://openalex.org/W2269241099","https://openalex.org/W6693645789"],"related_works":["https://openalex.org/W1588899229","https://openalex.org/W2085792030","https://openalex.org/W2023142747","https://openalex.org/W2037009764","https://openalex.org/W2501033992","https://openalex.org/W2039128285","https://openalex.org/W2088723847","https://openalex.org/W1967182499","https://openalex.org/W3021969771","https://openalex.org/W2379361621"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"propose":[4],"a":[5,18,62,114],"flexible":[6],"architecture":[7,32,106],"that":[8,56,103],"performs":[9],"the":[10,13,39,46,69,72,76,85,90,104,111],"computation":[11,112],"of":[12,25,71,92,113,130,135],"discrete":[14,117],"wavelet":[15,118],"transform,":[16],"requiring":[17],"small":[19],"memory":[20],"space":[21],"and":[22,41,88,95,133],"is":[23,79,107],"capable":[24],"operating":[26],"at":[27],"high":[28],"sampling":[29],"rate.":[30],"The":[31],"employs":[33],"two":[34,53],"filtering":[35,50],"blocks":[36,78],"to":[37,44,83,101],"compute":[38],"transform":[40,119],"one":[42],"buffer":[43,86],"store":[45],"intermediate":[47],"results.":[48],"Each":[49],"block":[51],"has":[52],"processing":[54],"units":[55],"operate":[57],"independently":[58],"in":[59,81,128],"parallel":[60],"using":[61],"two-phase":[63],"scheduling.":[64],"An":[65],"efficient":[66,109],"scheme":[67],"for":[68,110],"synchronization":[70],"data":[73],"flow":[74],"among":[75],"three":[77],"provided":[80],"order":[82],"minimize":[84],"size":[87],"increase":[89],"speed":[91,134],"operation.":[93],"Verilog":[94],"HSPICE":[96],"simulation":[97],"results":[98],"are":[99],"presented":[100],"show":[102],"proposed":[105],"more":[108],"fully":[115],"decomposed":[116],"with":[120],"high-tap":[121],"filters":[122],"than":[123],"some":[124],"other":[125],"existing":[126],"architectures":[127],"terms":[129],"their":[131],"areas":[132],"operations.":[136]},"counts_by_year":[{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}