{"id":"https://openalex.org/W2114631875","doi":"https://doi.org/10.1109/icassp.2002.5745323","title":"An automated IP synthesizer for limited-resource DWT processor","display_name":"An automated IP synthesizer for limited-resource DWT processor","publication_year":2002,"publication_date":"2002-05-01","ids":{"openalex":"https://openalex.org/W2114631875","doi":"https://doi.org/10.1109/icassp.2002.5745323","mag":"2114631875"},"language":"en","primary_location":{"id":"doi:10.1109/icassp.2002.5745323","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.2002.5745323","pdf_url":null,"source":{"id":"https://openalex.org/S4363607879","display_name":"IEEE International Conference on Acoustics Speech and Signal Processing","issn_l":"1520-6149","issn":["1520-6149","2379-190X"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE International Conference on Acoustics Speech and Signal Processing","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111939155","display_name":"Ting-Hsun Wei","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ting-Hsun Wei","raw_affiliation_strings":["Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037745874","display_name":"Shiuh-Rong Huang","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shiuh-Rong Huang","raw_affiliation_strings":["Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5053658433","display_name":"Lan-Rong Dung","orcid":"https://orcid.org/0000-0002-7231-7029"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Lan-Rong Dung","raw_affiliation_strings":["Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","Dept. of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan, R. O. C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan","institution_ids":["https://openalex.org/I148366613"]},{"raw_affiliation_string":"Dept. of Electrical and Control Engineering, National Chiao Tung University, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.2232778,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":null,"first_page":"III","last_page":"3172"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7473055720329285},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.544638454914093},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5381098389625549},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4873405396938324},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4151419699192047},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3981145918369293},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3821788430213928},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3277052938938141},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3260291516780853},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3223501443862915},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32070809602737427},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1314813196659088}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7473055720329285},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.544638454914093},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5381098389625549},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4873405396938324},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4151419699192047},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3981145918369293},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3821788430213928},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3277052938938141},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3260291516780853},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3223501443862915},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32070809602737427},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1314813196659088},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icassp.2002.5745323","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.2002.5745323","pdf_url":null,"source":{"id":"https://openalex.org/S4363607879","display_name":"IEEE International Conference on Acoustics Speech and Signal Processing","issn_l":"1520-6149","issn":["1520-6149","2379-190X"],"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE International Conference on Acoustics Speech and Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1565971030","https://openalex.org/W1591500140","https://openalex.org/W1835805965","https://openalex.org/W2091920794","https://openalex.org/W2114543224","https://openalex.org/W2115443398","https://openalex.org/W2135598843","https://openalex.org/W2155962605","https://openalex.org/W6638523289"],"related_works":["https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W2612099726","https://openalex.org/W1967938402","https://openalex.org/W1978911128","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2160632767","https://openalex.org/W2160474882","https://openalex.org/W2135482679"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,13,19,79,96,104],"systematic":[4],"design":[5],"methodology":[6],"for":[7,86,119],"1-D/2-D":[8],"DWT":[9,25,43,53,62,73,107],"processor":[10,54],"based":[11],"on":[12,46],"novel":[14],"limited-resource":[15,48],"scheduling":[16,28,33,49],"algorithm.":[17],"Given":[18],"set":[20],"of":[21,67,106],"architecture":[22],"constraints":[23],"and":[24,59,117],"parameters,":[26],"the":[27,37,42,47,65,115],"algorithm":[29,50],"can":[30,75,109],"generate":[31],"four":[32],"matrices":[34],"that":[35,103],"drive":[36],"data":[38],"path":[39],"to":[40,83],"perform":[41],"computation.":[44],"Based":[45],"an":[51],"automated":[52],"synthesizer":[55],"has":[56,99],"been":[57,100],"developed":[58],"generates":[60],"constrained":[61],"processors":[63,91],"in":[64],"form":[66],"silicon":[68],"intelligent":[69],"property":[70],"(SIP).":[71],"The":[72],"SIP":[74],"be":[76,110],"embedded":[77],"into":[78],"SOC":[80],"or":[81],"mapped":[82],"program":[84],"codes":[85],"commercial":[87],"off-the-shelf":[88],"(COTS)":[89],"DSP":[90],"with":[92],"programmable":[93],"devices.":[94],"As":[95],"result,":[97],"it":[98],"successfully":[101],"proven":[102],"variety":[105],"SIPs":[108],"efficiently":[111],"realized":[112],"by":[113],"tuning":[114],"parameters":[116],"applied":[118],"signal":[120],"processing":[121],"applications.":[122]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
