{"id":"https://openalex.org/W1854805132","doi":"https://doi.org/10.1109/icassp.1986.1169154","title":"VDP : A versatile high performance vector distance processor","display_name":"VDP : A versatile high performance vector distance processor","publication_year":2005,"publication_date":"2005-03-23","ids":{"openalex":"https://openalex.org/W1854805132","doi":"https://doi.org/10.1109/icassp.1986.1169154","mag":"1854805132"},"language":"en","primary_location":{"id":"doi:10.1109/icassp.1986.1169154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1986.1169154","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '86. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068427334","display_name":"F. Jutand","orcid":null},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]},{"id":"https://openalex.org/I29607241","display_name":"\u00c9cole Normale Sup\u00e9rieure - PSL","ror":"https://ror.org/05a0dhs15","country_code":"FR","type":"other","lineage":["https://openalex.org/I2746051580","https://openalex.org/I29607241"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"F. Jutand","raw_affiliation_strings":["Ecole Nationale Sup\u00e9rieure des T\u00e9l\u00e9communications, Paris Cedex, France","Ecole Nationale Superieure Des Telecommunications, Paris Cedex, France"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Ecole Nationale Sup\u00e9rieure des T\u00e9l\u00e9communications, Paris Cedex, France","institution_ids":["https://openalex.org/I12356871"]},{"raw_affiliation_string":"Ecole Nationale Superieure Des Telecommunications, Paris Cedex, France","institution_ids":["https://openalex.org/I29607241"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009161645","display_name":"N. Demassieux","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"N. Demassieux","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5080211769","display_name":"D. Vicard","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"D. Vicard","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"11","issue":null,"first_page":"369","last_page":"372"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11447","display_name":"Blind Source Separation Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11447","display_name":"Blind Source Separation Techniques","score":0.9973000288009644,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11269","display_name":"Algorithms and Data Compression","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10201","display_name":"Speech Recognition and Synthesis","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8095766305923462},{"id":"https://openalex.org/keywords/vector-quantization","display_name":"Vector quantization","score":0.7272636890411377},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7143465280532837},{"id":"https://openalex.org/keywords/pattern-matching","display_name":"Pattern matching","score":0.5674622058868408},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.5065232515335083},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.5045863389968872},{"id":"https://openalex.org/keywords/spotting","display_name":"Spotting","score":0.4996206760406494},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4845989942550659},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.4502795934677124},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4222780168056488},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.42121490836143494},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4106256365776062},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.40634816884994507},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4038875699043274},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3983239233493805},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3896324932575226},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2962679862976074},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.24869808554649353},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22899630665779114},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.07870808243751526}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8095766305923462},{"id":"https://openalex.org/C199833920","wikidata":"https://www.wikidata.org/wiki/Q612536","display_name":"Vector quantization","level":2,"score":0.7272636890411377},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7143465280532837},{"id":"https://openalex.org/C68859911","wikidata":"https://www.wikidata.org/wiki/Q1503724","display_name":"Pattern matching","level":2,"score":0.5674622058868408},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.5065232515335083},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.5045863389968872},{"id":"https://openalex.org/C2779506182","wikidata":"https://www.wikidata.org/wiki/Q7580141","display_name":"Spotting","level":2,"score":0.4996206760406494},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4845989942550659},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.4502795934677124},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4222780168056488},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.42121490836143494},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4106256365776062},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40634816884994507},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4038875699043274},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3983239233493805},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3896324932575226},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2962679862976074},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.24869808554649353},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22899630665779114},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.07870808243751526},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icassp.1986.1169154","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1986.1169154","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '86. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1489931518","https://openalex.org/W1523690921","https://openalex.org/W2128160875","https://openalex.org/W2139106564"],"related_works":["https://openalex.org/W2034439647","https://openalex.org/W4249589822","https://openalex.org/W2103063669","https://openalex.org/W3184921334","https://openalex.org/W4255446307","https://openalex.org/W2033009170","https://openalex.org/W4386895402","https://openalex.org/W3202382261","https://openalex.org/W4362466842","https://openalex.org/W2988098900"],"abstract_inverted_index":{"Vector":[0,68,85],"quantization":[1],"and":[2,29,60,71,87,117],"Dynamic":[3,88,110],"Pattern":[4,89,111],"Matching":[5,90,112],"are":[6],"basic":[7],"operations":[8],"to":[9,63],"achieve":[10],"continuous":[11,44],"speech":[12,45],"recognition.":[13,46],"Only":[14],"their":[15],"implementation":[16,82],"in":[17],"VLSI":[18,100],"circuits":[19],"could":[20],"provide":[21],"the":[22,31,40,57,121],"high":[23,66],"performance":[24],"required":[25],"by":[26],"real-time":[27],"computation":[28],"allow":[30],"design":[32,64],"of":[33,43,74,83],"low-cost":[34,99],"systems,":[35],"two":[36],"key":[37],"points":[38],"for":[39,114],"industrial":[41],"development":[42],"Using":[47],"an":[48,80,93],"Integrated":[49],"\"Design\"":[50],"Methodology,":[51],"we":[52,95],"have":[53,96],"combined":[54],"optimizations":[55],"at":[56],"algorithmic,":[58],"architectural":[59],"layout":[61],"levels,":[62],"a":[65,72,98,109],"throughput":[67],"Distance":[69],"Processor,":[70],"set":[73],"matched":[75],"complementary":[76],"cells,":[77],"that":[78],"allows":[79],"easy":[81],"various":[84],"Quantization":[86],"chips.":[91],"As":[92],"application,":[94],"designed":[97],"circuit":[101],"achieving":[102],"diphone":[103],"spotting.":[104],"This":[105],"single":[106],"chip":[107],"implements":[108],"algorithm":[113],"20-frame":[115],"patterns":[116],"provides":[118],"every":[119],"10ms":[120],"four":[122],"best":[123],"candidates":[124],"among":[125],"500":[126],"patterns.":[127]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}