{"id":"https://openalex.org/W2100030355","doi":"https://doi.org/10.1109/icassp.1986.1168846","title":"A parallel architecture for recursive least square identification","display_name":"A parallel architecture for recursive least square identification","publication_year":2005,"publication_date":"2005-03-23","ids":{"openalex":"https://openalex.org/W2100030355","doi":"https://doi.org/10.1109/icassp.1986.1168846","mag":"2100030355"},"language":"en","primary_location":{"id":"doi:10.1109/icassp.1986.1168846","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1986.1168846","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '86. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025704398","display_name":"Kazumune Hashimoto","orcid":"https://orcid.org/0000-0002-9376-5760"},"institutions":[{"id":"https://openalex.org/I98285908","display_name":"Osaka University","ror":"https://ror.org/035t8zc32","country_code":"JP","type":"education","lineage":["https://openalex.org/I98285908"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"K. Hashimoto","raw_affiliation_strings":["Department of Control Engineering, Osaka University, Toyonaka, Osaka, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Control Engineering, Osaka University, Toyonaka, Osaka, Japan","institution_ids":["https://openalex.org/I98285908"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016998231","display_name":"Hidenori Kimura","orcid":"https://orcid.org/0000-0002-0818-4153"},"institutions":[{"id":"https://openalex.org/I98285908","display_name":"Osaka University","ror":"https://ror.org/035t8zc32","country_code":"JP","type":"education","lineage":["https://openalex.org/I98285908"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Kimura","raw_affiliation_strings":["Department of Control Engineering, Osaka University, Toyonaka, Osaka, Japan"],"affiliations":[{"raw_affiliation_string":"Department of Control Engineering, Osaka University, Toyonaka, Osaka, Japan","institution_ids":["https://openalex.org/I98285908"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5025704398"],"corresponding_institution_ids":["https://openalex.org/I98285908"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.18168459,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"11","issue":null,"first_page":"1185","last_page":"1188"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11447","display_name":"Blind Source Separation Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11447","display_name":"Blind Source Separation Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9957000017166138,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.7936174869537354},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7190650701522827},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7126123905181885},{"id":"https://openalex.org/keywords/identification","display_name":"Identification (biology)","score":0.6971401572227478},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5735699534416199},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5386452674865723},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.5083560347557068},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5036880373954773},{"id":"https://openalex.org/keywords/parallel-processing","display_name":"Parallel processing","score":0.4947147071361542},{"id":"https://openalex.org/keywords/computational-complexity-theory","display_name":"Computational complexity theory","score":0.4829849302768707},{"id":"https://openalex.org/keywords/square","display_name":"Square (algebra)","score":0.459018349647522},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.42075347900390625},{"id":"https://openalex.org/keywords/unit","display_name":"Unit (ring theory)","score":0.4195585548877716},{"id":"https://openalex.org/keywords/parallel-architecture","display_name":"Parallel architecture","score":0.41161128878593445},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.24813365936279297},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2190721035003662},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2063615620136261},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19370073080062866}],"concepts":[{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.7936174869537354},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7190650701522827},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7126123905181885},{"id":"https://openalex.org/C116834253","wikidata":"https://www.wikidata.org/wiki/Q2039217","display_name":"Identification (biology)","level":2,"score":0.6971401572227478},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5735699534416199},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5386452674865723},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.5083560347557068},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5036880373954773},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.4947147071361542},{"id":"https://openalex.org/C179799912","wikidata":"https://www.wikidata.org/wiki/Q205084","display_name":"Computational complexity theory","level":2,"score":0.4829849302768707},{"id":"https://openalex.org/C135692309","wikidata":"https://www.wikidata.org/wiki/Q111124","display_name":"Square (algebra)","level":2,"score":0.459018349647522},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.42075347900390625},{"id":"https://openalex.org/C122637931","wikidata":"https://www.wikidata.org/wiki/Q118084","display_name":"Unit (ring theory)","level":2,"score":0.4195585548877716},{"id":"https://openalex.org/C2985918086","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel architecture","level":3,"score":0.41161128878593445},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.24813365936279297},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2190721035003662},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2063615620136261},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19370073080062866},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C145420912","wikidata":"https://www.wikidata.org/wiki/Q853077","display_name":"Mathematics education","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icassp.1986.1168846","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1986.1168846","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '86. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1650765400","https://openalex.org/W1982465265","https://openalex.org/W1999736981","https://openalex.org/W2085887317","https://openalex.org/W2106875194","https://openalex.org/W2702652478"],"related_works":["https://openalex.org/W167776759","https://openalex.org/W2001383311","https://openalex.org/W1977388510","https://openalex.org/W2071069621","https://openalex.org/W596160764","https://openalex.org/W2097116177","https://openalex.org/W2136275268","https://openalex.org/W2000384426","https://openalex.org/W2912346576","https://openalex.org/W123408998"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"propose":[4],"a":[5,81],"parallel":[6],"architecture":[7],"for":[8,16],"computing":[9],"recursive":[10],"least":[11],"square":[12],"(RLS)":[13],"identification,":[14],"designed":[15],"VLSI.":[17],"The":[18,42],"RLS":[19],"identification":[20],"is":[21,31,49,105],"the":[22,67,99,103],"most":[23],"fundamental":[24],"method":[25,96],"of":[26,37,45,65,69,71,76,83,89,97],"estimating":[27],"system":[28,70],"parameters":[29],"and":[30,40,80],"widely":[32],"used":[33],"in":[34,91],"various":[35],"fields":[36],"signal":[38],"processing":[39],"control.":[41],"main":[43],"bottleneck":[44],"its":[46,50],"on-line":[47],"use":[48],"computational":[51],"complexity":[52],"which":[53],"requires":[54],"O(n":[55],"<sup":[56],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[57],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[58],")":[59],"unit":[60,93],"times":[61],"at":[62],"each":[63,87],"step":[64,88],"updating":[66,90],"estimate":[68],"O(n).":[72],"Our":[73],"architecture,":[74],"composed":[75],"(2n+6)":[77],"elementaly":[78],"processors":[79],"bank":[82],"delay":[84],"units,":[85],"computes":[86],"O(n)":[92],"times.":[94],"A":[95],"enhancing":[98],"throughput":[100],"by":[101],"vectorizing":[102],"measurements":[104],"also":[106],"given.":[107]},"counts_by_year":[{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}