{"id":"https://openalex.org/W1518802253","doi":"https://doi.org/10.1109/icassp.1985.1168166","title":"VLSI Gate array prime radix Fourier transform processor","display_name":"VLSI Gate array prime radix Fourier transform processor","publication_year":2005,"publication_date":"2005-03-23","ids":{"openalex":"https://openalex.org/W1518802253","doi":"https://doi.org/10.1109/icassp.1985.1168166","mag":"1518802253"},"language":"en","primary_location":{"id":"doi:10.1109/icassp.1985.1168166","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1985.1168166","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '85. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042580478","display_name":"David J. Spreadbury","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"D. Spreadbury","raw_affiliation_strings":["GEC Avionics Limited, Hertfordshire, UK"],"affiliations":[{"raw_affiliation_string":"GEC Avionics Limited, Hertfordshire, UK","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050307035","display_name":"T. Rees-Roberts","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"T. Rees-Roberts","raw_affiliation_strings":["GEC Avionics Limited, Hertfordshire, UK"],"affiliations":[{"raw_affiliation_string":"GEC Avionics Limited, Hertfordshire, UK","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5042580478"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.05650341,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"10","issue":null,"first_page":"1473","last_page":"1476"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9944000244140625,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6906416416168213},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6357976794242859},{"id":"https://openalex.org/keywords/discrete-fourier-transform","display_name":"Discrete Fourier transform (general)","score":0.5258401036262512},{"id":"https://openalex.org/keywords/prime","display_name":"Prime (order theory)","score":0.5151323080062866},{"id":"https://openalex.org/keywords/cooley\u2013tukey-fft-algorithm","display_name":"Cooley\u2013Tukey FFT algorithm","score":0.49501436948776245},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.4826838970184326},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.4592255651950836},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.4405127465724945},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.43437835574150085},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4264727532863617},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4148101806640625},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.4117131531238556},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4010578989982605},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.39407798647880554},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3669058084487915},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32547345757484436},{"id":"https://openalex.org/keywords/short-time-fourier-transform","display_name":"Short-time Fourier transform","score":0.30173689126968384},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2362850308418274},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16957718133926392},{"id":"https://openalex.org/keywords/fourier-analysis","display_name":"Fourier analysis","score":0.16345363855361938},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.15670734643936157},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.07875162363052368}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6906416416168213},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6357976794242859},{"id":"https://openalex.org/C57733114","wikidata":"https://www.wikidata.org/wiki/Q1006032","display_name":"Discrete Fourier transform (general)","level":5,"score":0.5258401036262512},{"id":"https://openalex.org/C184992742","wikidata":"https://www.wikidata.org/wiki/Q7243229","display_name":"Prime (order theory)","level":2,"score":0.5151323080062866},{"id":"https://openalex.org/C1370844","wikidata":"https://www.wikidata.org/wiki/Q5167446","display_name":"Cooley\u2013Tukey FFT algorithm","level":3,"score":0.49501436948776245},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.4826838970184326},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.4592255651950836},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.4405127465724945},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.43437835574150085},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4264727532863617},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4148101806640625},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.4117131531238556},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4010578989982605},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.39407798647880554},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3669058084487915},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32547345757484436},{"id":"https://openalex.org/C166386157","wikidata":"https://www.wikidata.org/wiki/Q1477735","display_name":"Short-time Fourier transform","level":4,"score":0.30173689126968384},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2362850308418274},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16957718133926392},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.16345363855361938},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.15670734643936157},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.07875162363052368},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icassp.1985.1168166","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1985.1168166","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '85. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1569931438","https://openalex.org/W1987741783","https://openalex.org/W2083333315","https://openalex.org/W2127068863","https://openalex.org/W2317325569","https://openalex.org/W4232786604","https://openalex.org/W4245454392"],"related_works":["https://openalex.org/W2154006536","https://openalex.org/W2030727626","https://openalex.org/W2348800014","https://openalex.org/W2066431770","https://openalex.org/W2002136255","https://openalex.org/W2042527476","https://openalex.org/W4362564158","https://openalex.org/W2365391860","https://openalex.org/W2155491755","https://openalex.org/W2085939569"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"the":[3,6,12,39,53,65,92],"development":[4,51],"of":[5,14,69],"transform":[7],"algorithm":[8,74],"which":[9,91],"results":[10],"in":[11,90],"design":[13],"two":[15],"gate":[16,98],"array":[17,99],"circuits":[18],"for":[19,38],"implementing":[20],"a":[21,34,70,78],"high":[22,71],"performance":[23,72],"Prime":[24],"Radix":[25],"Discrete":[26],"Fourier":[27],"Transform":[28],"(PRAT)":[29],"function,":[30],"that":[31],"will":[32],"form":[33],"key":[35],"processing":[36,47],"primitive":[37],"new":[40],"Control":[41],"Ordered":[42],"Sonar":[43],"Hardware":[44],"(COSH)":[45],"signal":[46],"architecture,":[48],"currently":[49],"under":[50],"at":[52],"Admiralty":[54],"Research":[55],"Establishment":[56],"(A.R.E.":[57],"Portland,":[58],"England)":[59],"[1].":[60],"Consideration":[61],"is":[62,77,101],"given":[63],"to":[64],"structure":[66],"and":[67],"derivation":[68],"DFT":[73],"whose":[75],"kernel":[76],"parallel":[79],"canonic":[80],"realisation":[81],"using":[82],"Curtis-Goertzel":[83],"second":[84],"order":[85],"recursive":[86],"filters.":[87],"The":[88],"way":[89],"resulting":[93],"circuit":[94],"topology":[95],"maps":[96],"onto":[97],"implementation":[100],"then":[102],"presented.":[103]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
