{"id":"https://openalex.org/W1798614781","doi":"https://doi.org/10.1109/icassp.1982.1171577","title":"A high performance VLSI CMOS arithmetic processor chip","display_name":"A high performance VLSI CMOS arithmetic processor chip","publication_year":2005,"publication_date":"2005-03-24","ids":{"openalex":"https://openalex.org/W1798614781","doi":"https://doi.org/10.1109/icassp.1982.1171577","mag":"1798614781"},"language":"en","primary_location":{"id":"doi:10.1109/icassp.1982.1171577","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1982.1171577","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '82. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060961705","display_name":"Glen J. Culler","orcid":null},"institutions":[{"id":"https://openalex.org/I4210159078","display_name":"CHI Systems (United States)","ror":"https://ror.org/052d4jz71","country_code":"US","type":"company","lineage":["https://openalex.org/I4210159078"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"G. Culler","raw_affiliation_strings":["CHI Systems, Inc., Goleta, CA, USA"],"affiliations":[{"raw_affiliation_string":"CHI Systems, Inc., Goleta, CA, USA","institution_ids":["https://openalex.org/I4210159078"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071803590","display_name":"E. Greenwood","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E. Greenwood","raw_affiliation_strings":["Government Electronics Group, Motorola, Inc., Scottsdale, AZ, USA"],"affiliations":[{"raw_affiliation_string":"Government Electronics Group, Motorola, Inc., Scottsdale, AZ, USA","institution_ids":["https://openalex.org/I1333370159"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009118421","display_name":"D. Harrison","orcid":null},"institutions":[{"id":"https://openalex.org/I1333370159","display_name":"Motorola (United States)","ror":"https://ror.org/01hafxd32","country_code":"US","type":"company","lineage":["https://openalex.org/I1333370159"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Harrison","raw_affiliation_strings":["Government Electronics Group, Motorola, Inc., Scottsdale, AZ, USA"],"affiliations":[{"raw_affiliation_string":"Government Electronics Group, Motorola, Inc., Scottsdale, AZ, USA","institution_ids":["https://openalex.org/I1333370159"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5060961705"],"corresponding_institution_ids":["https://openalex.org/I4210159078"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.0782989,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"7","issue":null,"first_page":"1053","last_page":"1056"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9758999943733215,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9758999943733215,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9736999869346619,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9595999717712402,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8005249500274658},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6728344559669495},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6593376398086548},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5719538331031799},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4023214876651764},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39566904306411743},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36494311690330505},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3439696431159973},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3274555206298828},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.20510661602020264},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13070592284202576},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.067019522190094}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8005249500274658},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6728344559669495},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6593376398086548},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5719538331031799},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4023214876651764},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39566904306411743},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36494311690330505},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3439696431159973},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3274555206298828},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.20510661602020264},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13070592284202576},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.067019522190094},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icassp.1982.1171577","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icassp.1982.1171577","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICASSP '82. IEEE International Conference on Acoustics, Speech, and Signal Processing","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.6600000262260437,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W4283025278","https://openalex.org/W2082432309","https://openalex.org/W2617868873","https://openalex.org/W817174743","https://openalex.org/W2098218272","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W1979789826","https://openalex.org/W1986774039"],"abstract_inverted_index":null,"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}