{"id":"https://openalex.org/W2547869729","doi":"https://doi.org/10.1109/icacci.2016.7732365","title":"Low power and temperature compatible FinFET based full adder circuit with optimised area","display_name":"Low power and temperature compatible FinFET based full adder circuit with optimised area","publication_year":2016,"publication_date":"2016-09-01","ids":{"openalex":"https://openalex.org/W2547869729","doi":"https://doi.org/10.1109/icacci.2016.7732365","mag":"2547869729"},"language":"en","primary_location":{"id":"doi:10.1109/icacci.2016.7732365","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icacci.2016.7732365","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Advances in Computing, Communications and Informatics (ICACCI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026952059","display_name":"Jiwanjot Kahlon","orcid":null},"institutions":[{"id":"https://openalex.org/I191972202","display_name":"Amity University","ror":"https://ror.org/02n9z0v62","country_code":"IN","type":"education","lineage":["https://openalex.org/I191972202"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Jiwanjot Kahlon","raw_affiliation_strings":["Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India","institution_ids":["https://openalex.org/I191972202"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100759277","display_name":"Pradeep Kumar","orcid":"https://orcid.org/0000-0002-0802-9305"},"institutions":[{"id":"https://openalex.org/I191972202","display_name":"Amity University","ror":"https://ror.org/02n9z0v62","country_code":"IN","type":"education","lineage":["https://openalex.org/I191972202"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pradeep Kumar","raw_affiliation_strings":["Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India","institution_ids":["https://openalex.org/I191972202"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048606068","display_name":"Anubhav Garg","orcid":null},"institutions":[{"id":"https://openalex.org/I191972202","display_name":"Amity University","ror":"https://ror.org/02n9z0v62","country_code":"IN","type":"education","lineage":["https://openalex.org/I191972202"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anubhav Garg","raw_affiliation_strings":["Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India","institution_ids":["https://openalex.org/I191972202"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079400687","display_name":"Ashutosh Gupta","orcid":"https://orcid.org/0000-0002-3768-6355"},"institutions":[{"id":"https://openalex.org/I191972202","display_name":"Amity University","ror":"https://ror.org/02n9z0v62","country_code":"IN","type":"education","lineage":["https://openalex.org/I191972202"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Ashutosh Gupta","raw_affiliation_strings":["Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics & Communication Engineering, Amity University Uttar Pradesh, Noida, India","institution_ids":["https://openalex.org/I191972202"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5026952059"],"corresponding_institution_ids":["https://openalex.org/I191972202"],"apc_list":null,"apc_paid":null,"fwci":0.3675,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.66726849,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"51","issue":null,"first_page":"2121","last_page":"2125"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9144514203071594},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.7587152719497681},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6008609533309937},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5843323469161987},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5834242701530457},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5795007944107056},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.48783376812934875},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.44833311438560486},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.43647146224975586},{"id":"https://openalex.org/keywords/transistor-count","display_name":"Transistor count","score":0.4241058826446533},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.38597050309181213},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24557730555534363},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.22080761194229126},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09763923287391663}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9144514203071594},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.7587152719497681},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6008609533309937},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5843323469161987},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5834242701530457},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5795007944107056},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.48783376812934875},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.44833311438560486},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.43647146224975586},{"id":"https://openalex.org/C196320899","wikidata":"https://www.wikidata.org/wiki/Q2623746","display_name":"Transistor count","level":4,"score":0.4241058826446533},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.38597050309181213},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24557730555534363},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.22080761194229126},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09763923287391663},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icacci.2016.7732365","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icacci.2016.7732365","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on Advances in Computing, Communications and Informatics (ICACCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1571837316","https://openalex.org/W1598025287","https://openalex.org/W1882507454","https://openalex.org/W1981364906","https://openalex.org/W2014984949","https://openalex.org/W2043240286","https://openalex.org/W2064699777","https://openalex.org/W2076526167","https://openalex.org/W2080259168","https://openalex.org/W2098769011","https://openalex.org/W2119060381","https://openalex.org/W2124551183","https://openalex.org/W2138289226","https://openalex.org/W2140307566","https://openalex.org/W2152216926","https://openalex.org/W2163636454","https://openalex.org/W2182132705","https://openalex.org/W2186569296","https://openalex.org/W2221192038","https://openalex.org/W2319716314","https://openalex.org/W2532139375","https://openalex.org/W4205908247"],"related_works":["https://openalex.org/W2619307913","https://openalex.org/W2622611104","https://openalex.org/W3127415269","https://openalex.org/W2558163707","https://openalex.org/W4200276208","https://openalex.org/W2339546864","https://openalex.org/W2184864716","https://openalex.org/W2025146138","https://openalex.org/W1882870471","https://openalex.org/W3015580345"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3,6],"implementation":[4],"of":[5,10,24,36,64,109,113],"improved":[7],"circuit":[8,17,34,66,111],"design":[9],"full":[11],"adder":[12,33,43],"which":[13,50],"is":[14,18,67,80,93,117,133],"1-bit.":[15],"The":[16,31,62,78,91],"planned":[19],"and":[20,39,56,125],"implemented":[21],"with":[22,88,119],"use":[23],"the":[25,58,107,110,114],"FinFETs":[26,45],"at":[27,104],"45":[28],"nm":[29],"technology.":[30],"proposed":[32,65,115],"consists":[35],"9":[37],"transistors":[38,49],"called":[40],"as":[41],"9-T":[42],"cell.":[44],"are":[46],"new":[47],"emerging":[48],"can":[51],"work":[52],"n":[53],"nanometer":[54],"range":[55],"overcome":[57],"short":[59],"channel":[60],"effects.":[61],"simulation":[63,79],"done":[68,81],"in":[69,123,130],"tanner":[70],"tool":[71],"version":[72],"13.0":[73],"using":[74],"FinFET":[75],"model":[76],"files.":[77],"to":[82,101],"compare":[83],"power,":[84],"power":[85,131],"delay":[86],"product":[87],"supply":[89],"voltage.":[90],"result":[92],"also":[94],"checked":[95],"for":[96],"temperature":[97],"points":[98],"from":[99],"-5":[100],"35":[102],"degrees":[103],"0.3V.":[105],"Finally,":[106],"comparison":[108],"performance":[112],"circuits":[116,122],"made":[118],"other":[120],"reported":[121],"literatures":[124],"more":[126],"than":[127],"99.9%":[128],"reduction":[129],"consumption":[132],"observed.":[134]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}