{"id":"https://openalex.org/W1659911080","doi":"https://doi.org/10.1109/icacci.2015.7275659","title":"Memory array with complementary resistive switch with memristive characteristics","display_name":"Memory array with complementary resistive switch with memristive characteristics","publication_year":2015,"publication_date":"2015-08-01","ids":{"openalex":"https://openalex.org/W1659911080","doi":"https://doi.org/10.1109/icacci.2015.7275659","mag":"1659911080"},"language":"en","primary_location":{"id":"doi:10.1109/icacci.2015.7275659","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icacci.2015.7275659","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058066383","display_name":"Sneha Mohan Patil","orcid":null},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Sneha Mohan Patil","raw_affiliation_strings":["Embedded Systems and Designs, VIT University Chennai campus, India"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Designs, VIT University Chennai campus, India","institution_ids":["https://openalex.org/I876193797"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051845306","display_name":"S. R. S. Prabhaharan","orcid":null},"institutions":[{"id":"https://openalex.org/I876193797","display_name":"Vellore Institute of Technology University","ror":"https://ror.org/00qzypv28","country_code":"IN","type":"education","lineage":["https://openalex.org/I876193797"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"S. R.S. Prabhaharan","raw_affiliation_strings":["Embedded Systems and Designs, VIT University Chennai campus, India","Embedded Systems and Design, VIT University Chennaicampus, India"],"affiliations":[{"raw_affiliation_string":"Embedded Systems and Designs, VIT University Chennai campus, India","institution_ids":["https://openalex.org/I876193797"]},{"raw_affiliation_string":"Embedded Systems and Design, VIT University Chennaicampus, India","institution_ids":["https://openalex.org/I876193797"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5058066383"],"corresponding_institution_ids":["https://openalex.org/I876193797"],"apc_list":null,"apc_paid":null,"fwci":0.3946,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.65608746,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"508","last_page":"513"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11128","display_name":"Transition Metal Oxide Nanomaterials","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2507","display_name":"Polymers and Plastics"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.937432050704956},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.8529689311981201},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.6825206279754639},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6706099510192871},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.6008712649345398},{"id":"https://openalex.org/keywords/neuromorphic-engineering","display_name":"Neuromorphic engineering","score":0.5014493465423584},{"id":"https://openalex.org/keywords/resistive-touchscreen","display_name":"Resistive touchscreen","score":0.49015745520591736},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.47835415601730347},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.4495396614074707},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.350954532623291},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3080822825431824},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.246244877576828},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23988017439842224},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18658757209777832},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13925939798355103},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.12821266055107117}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.937432050704956},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.8529689311981201},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.6825206279754639},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6706099510192871},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.6008712649345398},{"id":"https://openalex.org/C151927369","wikidata":"https://www.wikidata.org/wiki/Q1981312","display_name":"Neuromorphic engineering","level":3,"score":0.5014493465423584},{"id":"https://openalex.org/C6899612","wikidata":"https://www.wikidata.org/wiki/Q852911","display_name":"Resistive touchscreen","level":2,"score":0.49015745520591736},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.47835415601730347},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.4495396614074707},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.350954532623291},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3080822825431824},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.246244877576828},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23988017439842224},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18658757209777832},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13925939798355103},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.12821266055107117},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icacci.2015.7275659","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icacci.2015.7275659","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 International Conference on Advances in Computing, Communications and Informatics (ICACCI)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1532445749","https://openalex.org/W1982666872","https://openalex.org/W1986812532","https://openalex.org/W2008901850","https://openalex.org/W2043782913","https://openalex.org/W2048059715","https://openalex.org/W2050535096","https://openalex.org/W2052918019","https://openalex.org/W2064756415","https://openalex.org/W2106343578","https://openalex.org/W2112181056","https://openalex.org/W2144304010","https://openalex.org/W2162651880","https://openalex.org/W6662381173"],"related_works":["https://openalex.org/W2171130799","https://openalex.org/W3212508523","https://openalex.org/W1568378063","https://openalex.org/W3173413269","https://openalex.org/W1995352804","https://openalex.org/W3207218810","https://openalex.org/W2015477599","https://openalex.org/W4253441086","https://openalex.org/W3164474614","https://openalex.org/W2895545069"],"abstract_inverted_index":{"Emerging":[0],"solid":[1,22],"state":[2,23,186],"memory":[3,62,67,75,167],"devices":[4,126],"based":[5,118,163,199],"on":[6,150],"different":[7,185],"materials":[8],"and":[9,26,146,158,172,213],"volatility":[10],"has":[11,107,178],"been":[12,109],"widely":[13],"acknowledged":[14],"like":[15,78],"NVRAMs":[16],"(or":[17],"Memristor).":[18],"Evolution":[19],"of":[20,35,38,49,55,124,153,187,216,219],"new":[21,36,66,128],"ionic":[24],"conductors":[25],"in":[27,130,182,211],"particular":[28],"(Memristor)":[29],"brought":[30],"impetus":[31],"to":[32,96,115,142,197,228,231],"the":[33,43,60,121,222],"creation":[34],"domain":[37],"larger":[39],"storage":[40],"capabilities":[41],"for":[42,169,236],"future":[44],"electronic":[45],"systems.":[46],"The":[47,176],"achievements":[48],"these":[50,125],"emerging":[51],"technologies":[52],"are":[53],"kind":[54],"encouraging":[56],"when":[57],"compared":[58,196],"with":[59,92],"existing":[61],"types.":[63],"Accordingly,":[64],"a":[65,98,112,147,159],"architecture":[68],"called":[69],"Resistive":[70],"Random":[71],"Access":[72],"Memory":[73],"(ReRAM)":[74],"faces":[76],"challenges":[77,129],"sneak":[79,192,238],"path":[80,193,239],"current":[81,194],"flowing":[82],"through":[83],"neighbouring":[84],"cells":[85],"which":[86,189],"limits":[87],"array":[88,100,212],"size.":[89],"To":[90],"deal":[91],"such":[93,132],"issue":[94],"is":[95,141,155,174,227,234],"enforce":[97],"crossbar":[99],"using":[101],"complementary":[102,164],"resistive":[103,165],"switch":[104,166],"(CRS).":[105],"CRS":[106,177,188,220,233],"recently":[108],"proclaimed":[110],"as":[111,134,195,206,230],"great":[113],"beneficiary":[114],"conventional":[116],"charge":[117],"memories.":[119],"But,":[120],"nanoscale":[122],"advantage":[123],"poses":[127],"designing":[131],"memories":[133],"well.":[135],"In":[136],"this":[137],"paper,":[138],"our":[139,225],"purpose":[140],"familiarize":[143],"Memristor":[144,154],"principle":[145],"preliminary":[148],"note":[149],"various":[151],"understanding":[152],"also":[156],"described":[157],"novel":[160],"non-linear":[161],"memristive":[162],"model":[168],"effective":[170],"simulation":[171],"analysis":[173],"described.":[175],"two":[179,214],"memristor":[180,198],"connected":[181],"anti-serially.":[183],"Four":[184],"significantly":[190],"reduces":[191],"architecture.":[200],"Here,":[201],"CRSs":[202],"can":[203],"be":[204],"viewed":[205],"primary":[207],"logic":[208],"building":[209],"block":[210],"modes":[215],"resistance":[217],"states":[218],"stores":[221],"information.":[223],"Thus,":[224],"aim":[226],"elucidate":[229],"how":[232],"beneficial":[235],"reducing":[237],"current.":[240]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
