{"id":"https://openalex.org/W2421769283","doi":"https://doi.org/10.1109/hst.2016.7495560","title":"Functional block identification in circuit design recovery","display_name":"Functional block identification in circuit design recovery","publication_year":2016,"publication_date":"2016-05-01","ids":{"openalex":"https://openalex.org/W2421769283","doi":"https://doi.org/10.1109/hst.2016.7495560","mag":"2421769283"},"language":"en","primary_location":{"id":"doi:10.1109/hst.2016.7495560","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hst.2016.7495560","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020620888","display_name":"Jacob Couch","orcid":"https://orcid.org/0000-0003-1726-7898"},"institutions":[{"id":"https://openalex.org/I145311948","display_name":"Johns Hopkins University","ror":"https://ror.org/00za53h95","country_code":"US","type":"education","lineage":["https://openalex.org/I145311948"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jacob Couch","raw_affiliation_strings":["Johns Hopkins University, Baltimore, MD, US"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Johns Hopkins University, Baltimore, MD, US","institution_ids":["https://openalex.org/I145311948"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001538214","display_name":"Elizabeth P. Reilly","orcid":"https://orcid.org/0009-0005-1100-0852"},"institutions":[{"id":"https://openalex.org/I2802946424","display_name":"Johns Hopkins University Applied Physics Laboratory","ror":"https://ror.org/029pp9z10","country_code":"US","type":"facility","lineage":["https://openalex.org/I145311948","https://openalex.org/I2802946424"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Elizabeth Reilly","raw_affiliation_strings":["Johns Hopkins University, Applied Physics Laboratory, Laurel, MD"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Johns Hopkins University, Applied Physics Laboratory, Laurel, MD","institution_ids":["https://openalex.org/I2802946424"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002618995","display_name":"Morgan Schuyler","orcid":null},"institutions":[{"id":"https://openalex.org/I2802946424","display_name":"Johns Hopkins University Applied Physics Laboratory","ror":"https://ror.org/029pp9z10","country_code":"US","type":"facility","lineage":["https://openalex.org/I145311948","https://openalex.org/I2802946424"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Morgan Schuyler","raw_affiliation_strings":["Johns Hopkins University, Applied Physics Laboratory, Laurel, MD"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Johns Hopkins University, Applied Physics Laboratory, Laurel, MD","institution_ids":["https://openalex.org/I2802946424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048567499","display_name":"Bradley S. Barrett","orcid":"https://orcid.org/0000-0001-5754-5755"},"institutions":[{"id":"https://openalex.org/I2802946424","display_name":"Johns Hopkins University Applied Physics Laboratory","ror":"https://ror.org/029pp9z10","country_code":"US","type":"facility","lineage":["https://openalex.org/I145311948","https://openalex.org/I2802946424"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bradley Barrett","raw_affiliation_strings":["Johns Hopkins University, Applied Physics Laboratory, Laurel, MD"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Johns Hopkins University, Applied Physics Laboratory, Laurel, MD","institution_ids":["https://openalex.org/I2802946424"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.6023,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.82229299,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"75","last_page":"78"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.9147869348526001},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7780467867851257},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7073421478271484},{"id":"https://openalex.org/keywords/subgraph-isomorphism-problem","display_name":"Subgraph isomorphism problem","score":0.7041128277778625},{"id":"https://openalex.org/keywords/identification","display_name":"Identification (biology)","score":0.6292204856872559},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.554990828037262},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5353809595108032},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.4985237121582031},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4956318140029907},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.485806941986084},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.43366220593452454},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3791343569755554},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36601972579956055},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3262236714363098},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.2909069061279297},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24558010697364807},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1468091905117035},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10935842990875244}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.9147869348526001},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7780467867851257},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7073421478271484},{"id":"https://openalex.org/C131992880","wikidata":"https://www.wikidata.org/wiki/Q2528185","display_name":"Subgraph isomorphism problem","level":3,"score":0.7041128277778625},{"id":"https://openalex.org/C116834253","wikidata":"https://www.wikidata.org/wiki/Q2039217","display_name":"Identification (biology)","level":2,"score":0.6292204856872559},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.554990828037262},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5353809595108032},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.4985237121582031},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4956318140029907},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.485806941986084},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.43366220593452454},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3791343569755554},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36601972579956055},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3262236714363098},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2909069061279297},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24558010697364807},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1468091905117035},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10935842990875244},{"id":"https://openalex.org/C59822182","wikidata":"https://www.wikidata.org/wiki/Q441","display_name":"Botany","level":1,"score":0.0},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hst.2016.7495560","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hst.2016.7495560","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W391578156","https://openalex.org/W848447024","https://openalex.org/W1980164533","https://openalex.org/W2045818632","https://openalex.org/W2091656296","https://openalex.org/W2093308813","https://openalex.org/W2103408915","https://openalex.org/W2121947440","https://openalex.org/W2123594341","https://openalex.org/W2140000690","https://openalex.org/W2161998562","https://openalex.org/W2610857016","https://openalex.org/W6677945368","https://openalex.org/W6683630750"],"related_works":["https://openalex.org/W3209275736","https://openalex.org/W4388820979","https://openalex.org/W2421769283","https://openalex.org/W2109670648","https://openalex.org/W2120655977","https://openalex.org/W2000778050","https://openalex.org/W4233234973","https://openalex.org/W2157874690","https://openalex.org/W2540275465","https://openalex.org/W1964556228"],"abstract_inverted_index":{"Design":[0],"recovery":[1],"is":[2,29],"commonly":[3],"conducted":[4],"across":[5],"many":[6],"different":[7],"platforms":[8],"to":[9,31,66],"gain":[10],"knowledge":[11],"about":[12],"the":[13,67],"underlying":[14],"internals":[15],"of":[16,24],"a":[17,22,36,55],"system.":[18],"In":[19],"this":[20,39],"paper,":[21],"concept":[23],"segmentation":[25],"and":[26,48],"fuzzy":[27],"matching":[28],"introduced":[30],"identify":[32],"IP":[33,42],"blocks":[34],"within":[35,54],"design.":[37],"Through":[38],"process,":[40],"known":[41],"blocks,":[43],"especially":[44],"in":[45,64],"optimized":[46],"ASIC":[47],"FPGA":[49],"designs,":[50],"can":[51],"be":[52],"identified":[53],"netlist.":[56],"Furthermore,":[57],"these":[58],"algorithms":[59],"are":[60],"computationally":[61],"more":[62],"efficient":[63],"comparison":[65],"traditional":[68],"subgraph":[69],"isomorphism":[70],"problem.":[71]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}