{"id":"https://openalex.org/W1993177195","doi":"https://doi.org/10.1109/hst.2012.6224321","title":"t-Private logic synthesis on FPGAs","display_name":"t-Private logic synthesis on FPGAs","publication_year":2012,"publication_date":"2012-06-01","ids":{"openalex":"https://openalex.org/W1993177195","doi":"https://doi.org/10.1109/hst.2012.6224321","mag":"1993177195"},"language":"en","primary_location":{"id":"doi:10.1109/hst.2012.6224321","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hst.2012.6224321","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Hardware-Oriented Security and Trust","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101972772","display_name":"Jungmin Park","orcid":"https://orcid.org/0000-0002-2608-3858"},"institutions":[{"id":"https://openalex.org/I173911158","display_name":"Iowa State University","ror":"https://ror.org/04rswrd78","country_code":"US","type":"education","lineage":["https://openalex.org/I173911158"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jungmin Park","raw_affiliation_strings":["Dept. of Electrical & Computer Engineering, Iowa State University, Ames, Iowa, USA","Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa 50010, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical & Computer Engineering, Iowa State University, Ames, Iowa, USA","institution_ids":["https://openalex.org/I173911158"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa 50010, USA","institution_ids":["https://openalex.org/I173911158"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102977539","display_name":"Akhilesh Tyagi","orcid":"https://orcid.org/0000-0002-2101-3594"},"institutions":[{"id":"https://openalex.org/I173911158","display_name":"Iowa State University","ror":"https://ror.org/04rswrd78","country_code":"US","type":"education","lineage":["https://openalex.org/I173911158"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Akhilesh Tyagi","raw_affiliation_strings":["Dept. of Electrical & Computer Engineering, Iowa State University, Ames, Iowa, USA","Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa 50010, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electrical & Computer Engineering, Iowa State University, Ames, Iowa, USA","institution_ids":["https://openalex.org/I173911158"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Iowa State University, Ames, Iowa 50010, USA","institution_ids":["https://openalex.org/I173911158"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4646,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.81101365,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"2729","issue":null,"first_page":"63","last_page":"68"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10237","display_name":"Cryptography and Data Security","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6606959104537964},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.611212432384491},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4987766742706299},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.44961613416671753},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3589898943901062},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3261580467224121},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.13417625427246094}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6606959104537964},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.611212432384491},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4987766742706299},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.44961613416671753},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3589898943901062},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3261580467224121},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.13417625427246094}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hst.2012.6224321","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hst.2012.6224321","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE International Symposium on Hardware-Oriented Security and Trust","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.4300000071525574}],"awards":[],"funders":[{"id":"https://openalex.org/F4320337396","display_name":"Division of Industrial Innovation and Partnerships","ror":"https://ror.org/03xyg3m20"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W83781150","https://openalex.org/W1530194244","https://openalex.org/W1569151289","https://openalex.org/W1592625985","https://openalex.org/W1699782153","https://openalex.org/W1999602050","https://openalex.org/W2001577466","https://openalex.org/W2121417875","https://openalex.org/W2154909745","https://openalex.org/W2161874663","https://openalex.org/W6603343484","https://openalex.org/W6634150308","https://openalex.org/W6635520437","https://openalex.org/W6637406285"],"related_works":["https://openalex.org/W2096844293","https://openalex.org/W2363944576","https://openalex.org/W2351041855","https://openalex.org/W2570254841","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2098419840","https://openalex.org/W1966764473","https://openalex.org/W2130565894"],"abstract_inverted_index":{"A":[0],"t-private":[1,24,45,53,67,77],"circuit":[2,78],"reveals":[3],"no":[4],"information":[5],"about":[6],"any":[7],"internal":[8],"logic":[9,25,69],"node":[10],"with":[11],"up":[12],"to":[13,74],"t":[14,31],"probes":[15,32],"each":[16],"cycle.":[17],"In":[18],"this":[19],"paper,":[20],"we":[21],"propose":[22],"efficient":[23],"design":[26],"schemas.":[27],"Note":[28],"that":[29],"these":[30],"pose":[33],"a":[34,39],"more":[35],"powerful":[36],"adversary":[37],"than":[38],"side-channel":[40],"attack.":[41],"We":[42,62],"develop":[43],"tail-recursive":[44,52,68],"circuits":[46,54],"based":[47],"on":[48,71],"AND-XOR":[49],"networks.":[50],"The":[51],"are":[55],"especially":[56],"well-suited":[57],"for":[58,90],"FPGA":[59,91],"LUT":[60],"implementations.":[61,92],"implement":[63],"simple":[64],"adders":[65],"using":[66],"synthesis":[70],"FPGA.":[72],"Compared":[73],"the":[75],"original":[76],"model,":[79],"our":[80],"model":[81],"reduces":[82],"area":[83],"by":[84,88],"50%":[85],"and":[86],"delay":[87],"33%":[89]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}