{"id":"https://openalex.org/W4308090759","doi":"https://doi.org/10.1109/hpec55821.2022.9926413","title":"Flexible Hardware Accelerator Design Generation with Spiral","display_name":"Flexible Hardware Accelerator Design Generation with Spiral","publication_year":2022,"publication_date":"2022-09-19","ids":{"openalex":"https://openalex.org/W4308090759","doi":"https://doi.org/10.1109/hpec55821.2022.9926413"},"language":"en","primary_location":{"id":"doi:10.1109/hpec55821.2022.9926413","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpec55821.2022.9926413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003023334","display_name":"Guanglin Xu","orcid":"https://orcid.org/0009-0007-7743-9088"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Guanglin Xu","raw_affiliation_strings":["Carnegie Mellon University,Department of Electrical and Computer Engineering","Department of Electrical and Computer Engineering, Carnegie Mellon University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University,Department of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019376179","display_name":"James C. Hoe","orcid":"https://orcid.org/0000-0002-9302-5287"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"James C. Hoe","raw_affiliation_strings":["Carnegie Mellon University,Department of Electrical and Computer Engineering","Department of Electrical and Computer Engineering, Carnegie Mellon University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University,Department of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062806943","display_name":"Franz Franchetti","orcid":"https://orcid.org/0000-0002-3529-8973"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Franz Franchetti","raw_affiliation_strings":["Carnegie Mellon University,Department of Electrical and Computer Engineering","Department of Electrical and Computer Engineering, Carnegie Mellon University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Carnegie Mellon University,Department of Electrical and Computer Engineering","institution_ids":["https://openalex.org/I74973139"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University","institution_ids":["https://openalex.org/I74973139"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6998,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.68261649,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9930999875068665,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8016083240509033},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.66855788230896},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6664518117904663},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.5840680003166199},{"id":"https://openalex.org/keywords/spiral","display_name":"Spiral (railway)","score":0.5250756144523621},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5158328413963318},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5028542876243591},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.43004941940307617},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.4231765866279602},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42046642303466797},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35498228669166565},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3433593809604645},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.24438944458961487},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2211940884590149},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10171806812286377}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8016083240509033},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.66855788230896},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6664518117904663},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5840680003166199},{"id":"https://openalex.org/C174128100","wikidata":"https://www.wikidata.org/wiki/Q846907","display_name":"Spiral (railway)","level":2,"score":0.5250756144523621},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5158328413963318},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5028542876243591},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.43004941940307617},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.4231765866279602},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42046642303466797},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35498228669166565},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3433593809604645},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.24438944458961487},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2211940884590149},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10171806812286377},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpec55821.2022.9926413","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpec55821.2022.9926413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4234121237","https://openalex.org/W2946338335","https://openalex.org/W2381737837","https://openalex.org/W2008081695","https://openalex.org/W2780340867","https://openalex.org/W3112003551","https://openalex.org/W4212901485","https://openalex.org/W818536952","https://openalex.org/W2298493793","https://openalex.org/W2541819923"],"abstract_inverted_index":{"Hardware":[0],"specialization":[1],"has":[2,39],"become":[3],"a":[4,25,60,80,96,106],"widely":[5],"employed":[6],"technique":[7],"for":[8,31,42,48,72],"approaching":[9],"higher":[10],"performance":[11,126],"and":[12,27,86,127],"en-ergy":[13],"efficiency":[14],"in":[15],"computer":[16],"systems.":[17],"Yet":[18],"obtaining":[19],"efficient":[20],"cus-tom":[21],"hardware":[22,46,81,107],"designs":[23,47],"remains":[24],"challenging":[26],"tedious":[28],"task,":[29],"calling":[30],"the":[32,36,110],"automated":[33],"approaches.":[34],"In":[35,75],"past,":[37],"Spiral":[38,111],"been":[40],"used":[41],"generating":[43],"high-throughput":[44],"streaming":[45],"linear":[49],"transform":[50],"kernels.":[51],"This":[52],"paper":[53],"is":[54],"motivated":[55],"by":[56],"an":[57],"observation":[58],"that":[59,84],"memory-based":[61],"iterative":[62],"computing":[63],"model":[64],"may":[65],"allow":[66],"us":[67],"to":[68],"trade":[69],"off":[70],"throughput":[71],"algorithmic":[73],"flexibility.":[74],"this":[76,103,116],"paper,":[77],"we":[78],"present":[79],"generation":[82],"approach":[83,104,117],"generates":[85],"optimizes":[87],"algorithms":[88],"using":[89],"Spiral's":[90],"multi-level":[91],"domain-specific":[92],"languages":[93],"(DSLs),":[94],"targeting":[95],"scalar":[97],"load-store":[98],"architecture.":[99],"We":[100],"have":[101],"incorporated":[102],"as":[105],"backend":[108],"into":[109],"system.":[112],"Our":[113],"evaluation":[114],"of":[115],"on":[118],"several":[119],"fundamental":[120],"kernels":[121],"shows":[122],"flexibility":[123],"with":[124],"reasonable":[125],"resource":[128],"utilization.":[129]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}