{"id":"https://openalex.org/W4308090205","doi":"https://doi.org/10.1109/hpec55821.2022.9926398","title":"Challenges Designing for FPGAs Using High-Level Synthesis","display_name":"Challenges Designing for FPGAs Using High-Level Synthesis","publication_year":2022,"publication_date":"2022-09-19","ids":{"openalex":"https://openalex.org/W4308090205","doi":"https://doi.org/10.1109/hpec55821.2022.9926398"},"language":"en","primary_location":{"id":"doi:10.1109/hpec55821.2022.9926398","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpec55821.2022.9926398","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064396574","display_name":"Clayton J. Faber","orcid":null},"institutions":[{"id":"https://openalex.org/I204465549","display_name":"Washington University in St. Louis","ror":"https://ror.org/01yc7t268","country_code":"US","type":"education","lineage":["https://openalex.org/I204465549"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Clayton J. Faber","raw_affiliation_strings":["McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","institution_ids":["https://openalex.org/I204465549"]},{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA","institution_ids":["https://openalex.org/I204465549"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103040007","display_name":"Steven Harris","orcid":"https://orcid.org/0000-0001-5943-3036"},"institutions":[{"id":"https://openalex.org/I204465549","display_name":"Washington University in St. Louis","ror":"https://ror.org/01yc7t268","country_code":"US","type":"education","lineage":["https://openalex.org/I204465549"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven D. Harris","raw_affiliation_strings":["McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","institution_ids":["https://openalex.org/I204465549"]},{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA","institution_ids":["https://openalex.org/I204465549"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084698484","display_name":"Zhili Xiac","orcid":null},"institutions":[{"id":"https://openalex.org/I204465549","display_name":"Washington University in St. Louis","ror":"https://ror.org/01yc7t268","country_code":"US","type":"education","lineage":["https://openalex.org/I204465549"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhili Xiac","raw_affiliation_strings":["McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","institution_ids":["https://openalex.org/I204465549"]},{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA","institution_ids":["https://openalex.org/I204465549"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006814645","display_name":"Roger D. Chamberlain","orcid":"https://orcid.org/0000-0002-7207-6106"},"institutions":[{"id":"https://openalex.org/I204465549","display_name":"Washington University in St. Louis","ror":"https://ror.org/01yc7t268","country_code":"US","type":"education","lineage":["https://openalex.org/I204465549"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Roger D. Chamberlain","raw_affiliation_strings":["McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis,St. Louis,MO,USA","institution_ids":["https://openalex.org/I204465549"]},{"raw_affiliation_string":"McKelvey School of Engineering, Washington Univ. in St. Louis, St. Louis, MO, USA","institution_ids":["https://openalex.org/I204465549"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004461689","display_name":"Anthony M. Cabrera","orcid":"https://orcid.org/0000-0002-6561-0382"},"institutions":[{"id":"https://openalex.org/I1289243028","display_name":"Oak Ridge National Laboratory","ror":"https://ror.org/01qz5mb56","country_code":"US","type":"facility","lineage":["https://openalex.org/I1289243028","https://openalex.org/I1330989302","https://openalex.org/I39565521","https://openalex.org/I4210159294"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anthony M. Cabrera","raw_affiliation_strings":["Oak Ridge National Laboratory,Architectures and Performance Group,Oak Ridge,TN,USA","Architectures and Performance Group, Oak Ridge National Laboratory, Oak Ridge, TN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Oak Ridge National Laboratory,Architectures and Performance Group,Oak Ridge,TN,USA","institution_ids":["https://openalex.org/I1289243028"]},{"raw_affiliation_string":"Architectures and Performance Group, Oak Ridge National Laboratory, Oak Ridge, TN, USA","institution_ids":["https://openalex.org/I1289243028"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1664,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.77275986,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.892784833908081},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.8195208311080933},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.793218731880188},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7443720698356628},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5815439820289612},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5542781949043274},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5038570761680603},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.48166120052337646},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46548786759376526},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.4100794494152069},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33446696400642395},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.31038546562194824}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.892784833908081},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.8195208311080933},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.793218731880188},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7443720698356628},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5815439820289612},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5542781949043274},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5038570761680603},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.48166120052337646},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46548786759376526},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.4100794494152069},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33446696400642395},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.31038546562194824},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpec55821.2022.9926398","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpec55821.2022.9926398","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE High Performance Extreme Computing Conference (HPEC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","score":0.5799999833106995,"display_name":"Decent work and economic growth"}],"awards":[{"id":"https://openalex.org/G2106683148","display_name":null,"funder_award_id":"CNS-1763503,CNS-1814739","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2056509023","https://openalex.org/W2944879222","https://openalex.org/W2096823099","https://openalex.org/W2756580024","https://openalex.org/W2271624625","https://openalex.org/W1604323946","https://openalex.org/W4293143575","https://openalex.org/W2039520903","https://openalex.org/W2506672464","https://openalex.org/W2291584307"],"abstract_inverted_index":{"High-Level":[0],"Synthesis":[1],"(HLS)":[2],"tools":[3,21],"are":[4,12,22,94],"aimed":[5],"at":[6],"enabling":[7],"performant":[8],"FPGA":[9],"designs":[10,34],"that":[11,93,107],"authored":[13],"in":[14,60],"a":[15,28,89,101],"high-level":[16],"language.":[17],"While":[18],"commercial":[19],"HLS":[20,37,97],"available":[23],"today,":[24],"there":[25],"is":[26],"still":[27],"substantial":[29],"performance":[30,52,105],"gap":[31],"between":[32,68],"most":[33],"developed":[35],"via":[36],"relative":[38],"to":[39,88],"traditional,":[40],"labor":[41],"intensive":[42],"approaches.":[43],"We":[44],"report":[45],"on":[46],"several":[47],"cases":[48],"where":[49],"an":[50],"anticipated":[51],"improvement":[53],"was":[54],"either":[55],"not":[56],"realized":[57],"or":[58],"resulted":[59],"decreased":[61],"performance.":[62],"These":[63],"include:":[64],"programming":[65],"paradigm":[66],"choices":[67],"data":[69,82],"parallel":[70],"vs.":[71],"pipelined":[72],"designs;":[73],"dataflow":[74],"implementations;":[75],"configuration":[76],"parameter":[77],"choices;":[78],"and":[79],"handling":[80],"odd":[81],"set":[83],"sizes.":[84],"The":[85],"results":[86],"point":[87],"number":[90],"of":[91],"improvements":[92],"needed":[95],"for":[96,104],"tool":[98],"flows,":[99],"including":[100],"strong":[102],"need":[103],"modeling":[106],"can":[108],"reliably":[109],"guide":[110],"the":[111],"compilation":[112],"optimization":[113],"process.":[114]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}