{"id":"https://openalex.org/W2557515111","doi":"https://doi.org/10.1109/hpec.2016.7761633","title":"3D DRAM based application specific hardware accelerator for SpMV","display_name":"3D DRAM based application specific hardware accelerator for SpMV","publication_year":2016,"publication_date":"2016-09-01","ids":{"openalex":"https://openalex.org/W2557515111","doi":"https://doi.org/10.1109/hpec.2016.7761633","mag":"2557515111"},"language":"en","primary_location":{"id":"doi:10.1109/hpec.2016.7761633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpec.2016.7761633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE High Performance Extreme Computing Conference (HPEC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013781918","display_name":"Fazle Sadi","orcid":null},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fazle Sadi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033242808","display_name":"Larry Pileggi","orcid":"https://orcid.org/0000-0002-8605-8240"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Larry Pileggi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062806943","display_name":"Franz Franchetti","orcid":"https://orcid.org/0000-0002-3529-8973"},"institutions":[{"id":"https://openalex.org/I74973139","display_name":"Carnegie Mellon University","ror":"https://ror.org/05x2bcf33","country_code":"US","type":"education","lineage":["https://openalex.org/I74973139"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Franz Franchetti","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Carnegie Mellon University, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I74973139"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I74973139"],"apc_list":null,"apc_paid":null,"fwci":0.6408,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.69609539,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9945999979972839,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8713817596435547},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.688989520072937},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.6653846502304077},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.48950207233428955},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.4708886742591858},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.45796138048171997},{"id":"https://openalex.org/keywords/high-memory","display_name":"High memory","score":0.4218885898590088},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.42147159576416016},{"id":"https://openalex.org/keywords/sparse-matrix","display_name":"Sparse matrix","score":0.4179345965385437},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3572821319103241},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.321224570274353},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.25978127121925354}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8713817596435547},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.688989520072937},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.6653846502304077},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.48950207233428955},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.4708886742591858},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.45796138048171997},{"id":"https://openalex.org/C2781357197","wikidata":"https://www.wikidata.org/wiki/Q5757597","display_name":"High memory","level":2,"score":0.4218885898590088},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.42147159576416016},{"id":"https://openalex.org/C56372850","wikidata":"https://www.wikidata.org/wiki/Q1050404","display_name":"Sparse matrix","level":3,"score":0.4179345965385437},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3572821319103241},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.321224570274353},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.25978127121925354},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C163716315","wikidata":"https://www.wikidata.org/wiki/Q901177","display_name":"Gaussian","level":2,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpec.2016.7761633","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpec.2016.7761633","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE High Performance Extreme Computing Conference (HPEC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4399999976158142,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W4281677350","https://openalex.org/W4284884988","https://openalex.org/W1541167181","https://openalex.org/W4214760333","https://openalex.org/W4391042164","https://openalex.org/W4389888442","https://openalex.org/W2149142646","https://openalex.org/W2250217037","https://openalex.org/W2149529325","https://openalex.org/W4200309432"],"abstract_inverted_index":{"For":[0],"numerous":[1],"scientific":[2],"applications":[3],"Sparse":[4],"Matrix-Vector":[5],"multiplication":[6],"(SpMV)":[7],"is":[8,28,47,82,99,111,126,138,192,203],"one":[9],"of":[10,22,42,134,163,169],"the":[11,35,38,59,94,117,135,143,153,164,185],"most":[12],"important":[13],"kernels.":[14],"Unfortunately,":[15],"due":[16],"to":[17,24,92,114,183,200],"its":[18],"very":[19],"low":[20],"ratio":[21,202],"computation":[23,51],"memory":[25,31,40,60,79,96,145,165],"access":[26,76,147],"SpMV":[27,73,108],"inherently":[29],"a":[30,64,78,173],"bound":[32],"problem.":[33,62],"On":[34,167],"other":[36],"hand,":[37],"main":[39,95,144],"bandwidth":[41,97],"commercial":[43],"off-the-shelf":[44],"(COTS)":[45],"architectures":[46,67],"insufficient":[48],"for":[49,70,86,106,195],"available":[50],"resources":[52],"on":[53],"these":[54],"platforms,":[55],"well":[56],"known":[57],"as":[58],"wall":[61],"As":[63],"result,":[65],"COTS":[66],"are":[68],"unsuitable":[69],"SpMV.":[71],"Furthermore,":[72],"requires":[74],"random":[75,146],"into":[77,148],"space":[80],"which":[81,98,110],"far":[83],"too":[84],"big":[85],"cache.":[87],"Hence,":[88],"it":[89,140],"becomes":[90],"difficult":[91],"utilize":[93],"already":[100],"scarce.":[101],"We":[102],"propose":[103,172],"an":[104],"algorithm":[105,125],"large":[107],"problems":[109],"specially":[112],"optimized":[113],"fully":[115],"exploit":[116],"underlying":[118],"micro-architecture":[119],"and":[120,159],"overall":[121,154],"system":[122],"capabilities.":[123],"This":[124,151],"implemented":[127],"in":[128],"two":[129],"steps.":[130],"The":[131],"key":[132],"feature":[133],"first":[136],"step":[137],"that":[139],"converts":[141],"all":[142],"streaming":[149],"access.":[150],"reduces":[152],"data":[155,186],"transfer":[156,187],"volume":[157,188],"significantly":[158],"ensures":[160],"full":[161],"utilization":[162],"bandwidth.":[166],"top":[168],"that,":[170],"we":[171],"meta-data":[174,199],"compression":[175],"technique,":[176],"namely":[177],"Variable":[178],"Length":[179],"Delta":[180],"Index":[181],"(VLDI),":[182],"decrease":[184],"even":[189],"further.":[190],"VLDI":[191],"particularly":[193],"effective":[194],"sparse":[196,206],"matrices":[197],"where":[198],"payload":[201],"high,":[204],"e.g.":[205],"bit":[207],"matrices.":[208]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
