{"id":"https://openalex.org/W2519620362","doi":"https://doi.org/10.1109/hpcsim.2016.7568360","title":"Modeling a switch architecture with virtual output queues and virtual channels in HPC-systems simulators","display_name":"Modeling a switch architecture with virtual output queues and virtual channels in HPC-systems simulators","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2519620362","doi":"https://doi.org/10.1109/hpcsim.2016.7568360","mag":"2519620362"},"language":"en","primary_location":{"id":"doi:10.1109/hpcsim.2016.7568360","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcsim.2016.7568360","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on High Performance Computing & Simulation (HPCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5017948332","display_name":"Pedro Y\u00e9benes","orcid":"https://orcid.org/0000-0002-3566-7652"},"institutions":[{"id":"https://openalex.org/I79189158","display_name":"University of Castilla-La Mancha","ror":"https://ror.org/05r78ng12","country_code":"ES","type":"education","lineage":["https://openalex.org/I79189158"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Pedro Yebenes","raw_affiliation_strings":["Dept. of Computing Sytems, University of Castilla-La Mancha, Spain"],"affiliations":[{"raw_affiliation_string":"Dept. of Computing Sytems, University of Castilla-La Mancha, Spain","institution_ids":["https://openalex.org/I79189158"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082634225","display_name":"German Maglione-Mathey","orcid":"https://orcid.org/0000-0002-4967-2268"},"institutions":[{"id":"https://openalex.org/I79189158","display_name":"University of Castilla-La Mancha","ror":"https://ror.org/05r78ng12","country_code":"ES","type":"education","lineage":["https://openalex.org/I79189158"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"German Maglione-Mathey","raw_affiliation_strings":["Dept. of Computing Sytems, University of Castilla-La Mancha, Spain"],"affiliations":[{"raw_affiliation_string":"Dept. of Computing Sytems, University of Castilla-La Mancha, Spain","institution_ids":["https://openalex.org/I79189158"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017427985","display_name":"Jes\u00fas Escudero\u2010Sahuquillo","orcid":"https://orcid.org/0000-0003-0835-8624"},"institutions":[{"id":"https://openalex.org/I79189158","display_name":"University of Castilla-La Mancha","ror":"https://ror.org/05r78ng12","country_code":"ES","type":"education","lineage":["https://openalex.org/I79189158"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jesus Escudero-Sahuquillo","raw_affiliation_strings":["Dept. of Computing Sytems, University of Castilla-La Mancha, Spain"],"affiliations":[{"raw_affiliation_string":"Dept. of Computing Sytems, University of Castilla-La Mancha, Spain","institution_ids":["https://openalex.org/I79189158"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025950276","display_name":"Pedro J. Garc\u00eda","orcid":"https://orcid.org/0000-0002-7350-6067"},"institutions":[{"id":"https://openalex.org/I79189158","display_name":"University of Castilla-La Mancha","ror":"https://ror.org/05r78ng12","country_code":"ES","type":"education","lineage":["https://openalex.org/I79189158"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pedro J. Garcia","raw_affiliation_strings":["Dept. of Computing Sytems, University of Castilla-La Mancha, Spain"],"affiliations":[{"raw_affiliation_string":"Dept. of Computing Sytems, University of Castilla-La Mancha, Spain","institution_ids":["https://openalex.org/I79189158"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055246289","display_name":"Francisco J. Quiles","orcid":"https://orcid.org/0000-0002-8966-6225"},"institutions":[{"id":"https://openalex.org/I79189158","display_name":"University of Castilla-La Mancha","ror":"https://ror.org/05r78ng12","country_code":"ES","type":"education","lineage":["https://openalex.org/I79189158"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Francisco J. Quiles","raw_affiliation_strings":["Dept. of Computing Sytems, University of Castilla-La Mancha, Spain"],"affiliations":[{"raw_affiliation_string":"Dept. of Computing Sytems, University of Castilla-La Mancha, Spain","institution_ids":["https://openalex.org/I79189158"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5017948332"],"corresponding_institution_ids":["https://openalex.org/I79189158"],"apc_list":null,"apc_paid":null,"fwci":0.8686,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.77665057,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"380","last_page":"386"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.820489227771759},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5403814911842346},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.5354903340339661},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5206124782562256},{"id":"https://openalex.org/keywords/virtual-channel","display_name":"Virtual channel","score":0.5175915956497192},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.5057368278503418},{"id":"https://openalex.org/keywords/queueing-theory","display_name":"Queueing theory","score":0.5046793222427368},{"id":"https://openalex.org/keywords/queue","display_name":"Queue","score":0.4951557219028473},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.47962960600852966},{"id":"https://openalex.org/keywords/port","display_name":"Port (circuit theory)","score":0.4787846803665161},{"id":"https://openalex.org/keywords/message-queue","display_name":"Message queue","score":0.44164666533470154},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.43311771750450134},{"id":"https://openalex.org/keywords/network-switch","display_name":"Network switch","score":0.41755443811416626},{"id":"https://openalex.org/keywords/packet-switching","display_name":"Packet switching","score":0.4172452688217163},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3703904151916504},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33344873785972595},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.28933992981910706},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09850862622261047}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.820489227771759},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5403814911842346},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.5354903340339661},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5206124782562256},{"id":"https://openalex.org/C2777076873","wikidata":"https://www.wikidata.org/wiki/Q2291875","display_name":"Virtual channel","level":3,"score":0.5175915956497192},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.5057368278503418},{"id":"https://openalex.org/C22684755","wikidata":"https://www.wikidata.org/wiki/Q847526","display_name":"Queueing theory","level":2,"score":0.5046793222427368},{"id":"https://openalex.org/C160403385","wikidata":"https://www.wikidata.org/wiki/Q220543","display_name":"Queue","level":2,"score":0.4951557219028473},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.47962960600852966},{"id":"https://openalex.org/C32802771","wikidata":"https://www.wikidata.org/wiki/Q2443617","display_name":"Port (circuit theory)","level":2,"score":0.4787846803665161},{"id":"https://openalex.org/C26324664","wikidata":"https://www.wikidata.org/wiki/Q1065525","display_name":"Message queue","level":2,"score":0.44164666533470154},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.43311771750450134},{"id":"https://openalex.org/C119404949","wikidata":"https://www.wikidata.org/wiki/Q4503","display_name":"Network switch","level":2,"score":0.41755443811416626},{"id":"https://openalex.org/C113508815","wikidata":"https://www.wikidata.org/wiki/Q193446","display_name":"Packet switching","level":3,"score":0.4172452688217163},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3703904151916504},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33344873785972595},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.28933992981910706},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09850862622261047},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpcsim.2016.7568360","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcsim.2016.7568360","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 International Conference on High Performance Computing & Simulation (HPCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1501077214","https://openalex.org/W1513716704","https://openalex.org/W1958793126","https://openalex.org/W2006714543","https://openalex.org/W2035403353","https://openalex.org/W2104674486","https://openalex.org/W2111366547","https://openalex.org/W2120655454","https://openalex.org/W2121523570","https://openalex.org/W2144195404","https://openalex.org/W2155187164","https://openalex.org/W2155652125","https://openalex.org/W2262594966","https://openalex.org/W2269796533","https://openalex.org/W2499905006","https://openalex.org/W3148898689","https://openalex.org/W3169463464","https://openalex.org/W6659162957","https://openalex.org/W6724476779"],"related_works":["https://openalex.org/W2166233551","https://openalex.org/W2167701370","https://openalex.org/W2103952885","https://openalex.org/W1586445591","https://openalex.org/W2142747892","https://openalex.org/W2911008497","https://openalex.org/W1959124236","https://openalex.org/W2112772280","https://openalex.org/W2124906592","https://openalex.org/W2138285635"],"abstract_inverted_index":{"The":[0],"high-performance":[1],"switches":[2],"used":[3],"in":[4,13,50,57,71,86,138,163],"the":[5,14,41,116,139,150,168,171,177,180,192,218],"interconnection":[6],"networks":[7],"of":[8,37,119,143,152,170,194,222],"HPC":[9],"systems":[10],"have":[11],"evolved":[12],"last":[15],"years":[16],"incorporating":[17],"new":[18,103,121,144],"features":[19,39,91],"that":[20,101],"were":[21,29],"proposed":[22],"decades":[23],"ago":[24],"as":[25,63,66],"theoretical":[26],"concepts":[27],"but":[28],"then":[30],"unfeasible":[31],"due":[32],"to":[33,73,96,135,185,201,204],"technological":[34],"constraints.":[35],"One":[36],"these":[38,120],"are":[40,68,83,123],"Virtual":[42,80],"Output":[43],"Queues":[44],"(VOQs)":[45],"which":[46],"can":[47,92],"be":[48,93,202],"included":[49],"current":[51,87],"switch":[52,88,98,154,173],"architectures.":[53,89],"This":[54,146],"approach":[55],"consists":[56],"implementing":[58,215],"at":[59],"each":[60],"input":[61],"port":[62],"many":[64],"queues":[65],"there":[67],"output":[69],"ports":[70],"order":[72],"eliminate":[74],"low-order":[75],"Head-of-Line":[76],"blocking.":[77],"Besides":[78],"VOQs,":[79],"Channels":[81],"(VCs)":[82],"usually":[84],"implemented":[85],"Both":[90],"jointly":[94],"configured":[95],"improve":[97],"performance.":[99],"For":[100],"reason,":[102],"techniques":[104],"and":[105,133,141,158,160,182,216,227],"proposals":[106],"exploit":[107],"their":[108,113],"advantages":[109],"while":[110],"they":[111],"solve":[112],"drawbacks.":[114],"Usually,":[115],"earliest":[117],"evaluations":[118],"improvements":[122],"performed":[124],"using":[125],"network":[126,131,206],"simulators.":[127,165],"These":[128],"tools":[129],"allow":[130],"designers":[132],"manufactures":[134],"save":[136],"time":[137],"testing":[140],"development":[142],"components.":[145],"paper":[147],"focuses":[148],"on":[149],"modeling":[151,193],"a":[153],"architecture":[155,174],"with":[156],"VOQs":[157,195],"VCs":[159],"its":[161],"implementation":[162],"HPC-systems":[164],"We":[166,189],"describe":[167],"basics":[169],"pipelined":[172],"assumed":[175],"for":[176,214],"model,":[178],"i.e.,":[179],"stages":[181],"operations":[183],"applied":[184],"packets":[186],"crossing":[187],"it.":[188],"also":[190],"detail":[191],"through":[196],"several":[197,223],"pseudo-code":[198],"algorithms,":[199],"ready":[200],"adapted":[203],"any":[205],"simulator.":[207],"Finally,":[208],"we":[209],"use":[210],"an":[211],"OMNeT++-based":[212],"simulator":[213],"evaluating":[217],"model":[219],"by":[220],"means":[221],"topologies,":[224],"traffic":[225],"scenarios":[226],"buffer":[228],"organizations.":[229]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}