{"id":"https://openalex.org/W2147907401","doi":"https://doi.org/10.1109/hpcsim.2012.6266967","title":"Representing sparse binary matrices as straight-line programs for fast matrix-vector multiplication","display_name":"Representing sparse binary matrices as straight-line programs for fast matrix-vector multiplication","publication_year":2012,"publication_date":"2012-07-01","ids":{"openalex":"https://openalex.org/W2147907401","doi":"https://doi.org/10.1109/hpcsim.2012.6266967","mag":"2147907401"},"language":"en","primary_location":{"id":"doi:10.1109/hpcsim.2012.6266967","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcsim.2012.6266967","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Conference on High Performance Computing &amp; Simulation (HPCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047636942","display_name":"Samuel Neves","orcid":"https://orcid.org/0000-0002-8305-376X"},"institutions":[{"id":"https://openalex.org/I76903346","display_name":"University of Coimbra","ror":"https://ror.org/04z8k9a98","country_code":"PT","type":"education","lineage":["https://openalex.org/I76903346"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Samuel Neves","raw_affiliation_strings":["CISUC, Department of Informatics Engineering, University of Coimbra, Portugal"],"affiliations":[{"raw_affiliation_string":"CISUC, Department of Informatics Engineering, University of Coimbra, Portugal","institution_ids":["https://openalex.org/I76903346"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046002820","display_name":"Filipe Ara\u00fajo","orcid":"https://orcid.org/0000-0002-1663-1937"},"institutions":[{"id":"https://openalex.org/I76903346","display_name":"University of Coimbra","ror":"https://ror.org/04z8k9a98","country_code":"PT","type":"education","lineage":["https://openalex.org/I76903346"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Filipe Araujo","raw_affiliation_strings":["CISUC, Department of Informatics Engineering, University of Coimbra, Portugal"],"affiliations":[{"raw_affiliation_string":"CISUC, Department of Informatics Engineering, University of Coimbra, Portugal","institution_ids":["https://openalex.org/I76903346"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5047636942"],"corresponding_institution_ids":["https://openalex.org/I76903346"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.16994566,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"921","issue":null,"first_page":"520","last_page":"526"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.788887619972229},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7584366798400879},{"id":"https://openalex.org/keywords/matrix-multiplication","display_name":"Matrix multiplication","score":0.681935727596283},{"id":"https://openalex.org/keywords/sparse-matrix","display_name":"Sparse matrix","score":0.5770038366317749},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.5416136384010315},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5180990099906921},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.5002024173736572},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.438325434923172},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.4316061735153198},{"id":"https://openalex.org/keywords/multiplication-algorithm","display_name":"Multiplication algorithm","score":0.4136224091053009},{"id":"https://openalex.org/keywords/cache-oblivious-algorithm","display_name":"Cache-oblivious algorithm","score":0.4118083417415619},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.41069698333740234},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.39463651180267334},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3507481515407562},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3324187695980072},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.26308345794677734},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.19986769556999207},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.18673783540725708},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13944891095161438},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.11845174431800842},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1021159291267395}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.788887619972229},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7584366798400879},{"id":"https://openalex.org/C17349429","wikidata":"https://www.wikidata.org/wiki/Q1049914","display_name":"Matrix multiplication","level":3,"score":0.681935727596283},{"id":"https://openalex.org/C56372850","wikidata":"https://www.wikidata.org/wiki/Q1050404","display_name":"Sparse matrix","level":3,"score":0.5770038366317749},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.5416136384010315},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5180990099906921},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5002024173736572},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.438325434923172},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.4316061735153198},{"id":"https://openalex.org/C201290732","wikidata":"https://www.wikidata.org/wiki/Q130762","display_name":"Multiplication algorithm","level":3,"score":0.4136224091053009},{"id":"https://openalex.org/C59687516","wikidata":"https://www.wikidata.org/wiki/Q5015938","display_name":"Cache-oblivious algorithm","level":5,"score":0.4118083417415619},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.41069698333740234},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.39463651180267334},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3507481515407562},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3324187695980072},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.26308345794677734},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.19986769556999207},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.18673783540725708},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13944891095161438},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.11845174431800842},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1021159291267395},{"id":"https://openalex.org/C84114770","wikidata":"https://www.wikidata.org/wiki/Q46344","display_name":"Quantum","level":2,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C163716315","wikidata":"https://www.wikidata.org/wiki/Q901177","display_name":"Gaussian","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpcsim.2012.6266967","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcsim.2012.6266967","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Conference on High Performance Computing &amp; Simulation (HPCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/1","score":0.44999998807907104,"display_name":"No poverty"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1515353552","https://openalex.org/W1518969538","https://openalex.org/W1531371507","https://openalex.org/W1538070674","https://openalex.org/W1576347883","https://openalex.org/W1653630692","https://openalex.org/W1857970128","https://openalex.org/W1965351873","https://openalex.org/W1993840452","https://openalex.org/W2071483197","https://openalex.org/W2099625934","https://openalex.org/W2104120668","https://openalex.org/W2126004407","https://openalex.org/W2130289795","https://openalex.org/W2142778315","https://openalex.org/W2162940257","https://openalex.org/W2166957790","https://openalex.org/W2167868137","https://openalex.org/W2179025976","https://openalex.org/W4206504405","https://openalex.org/W4320800818","https://openalex.org/W6630991115","https://openalex.org/W6675577517","https://openalex.org/W6684705998"],"related_works":["https://openalex.org/W4288024409","https://openalex.org/W2986341480","https://openalex.org/W2043670592","https://openalex.org/W1184054379","https://openalex.org/W2293771254","https://openalex.org/W91485067","https://openalex.org/W3121828480","https://openalex.org/W2039875226","https://openalex.org/W2369959890","https://openalex.org/W2256267046"],"abstract_inverted_index":{"Sparse":[0],"matrix-vector":[1],"multiplication":[2],"dominates":[3],"the":[4,22,67,78,86,93,101],"performance":[5,23],"of":[6,24,31,40,77,85,135],"many":[7,37],"scientific":[8],"and":[9,46,106,119],"industrial":[10],"problems.":[11],"For":[12],"example,":[13],"iterative":[14],"methods":[15],"for":[16,95],"solving":[17],"linear":[18],"systems":[19],"rely":[20],"on":[21,100,107],"this":[25,59],"critical":[26],"operation.":[27,60],"The":[28,81],"particular":[29],"case":[30],"binary":[32,108],"matrices":[33],"shows":[34],"up":[35,136],"in":[36],"important":[38],"areas":[39],"computing,":[41],"such":[42],"as":[43],"graph":[44],"theory":[45],"cryptography.":[47],"Unfortunately,":[48],"irregular":[49],"memory":[50,55,63,116],"access":[51,117],"patterns":[52],"cause":[53],"poor":[54],"throughput,":[56,64],"slowing":[57],"down":[58],"To":[61],"maximize":[62],"we":[65,131],"transform":[66],"matrix":[68],"into":[69],"a":[70,125],"straight-line":[71],"program":[72,87],"that":[73],"takes":[74],"full":[75],"advantage":[76],"instruction":[79],"cache.":[80],"regular":[82],"loopless":[83],"pattern":[84],"minimizes":[88],"cache":[89],"misses,":[90],"thus":[91],"decreasing":[92],"latency":[94],"most":[96],"instructions.":[97],"We":[98],"focus":[99],"widely":[102],"used":[103],"x86_64":[104],"architecture":[105],"matrices,":[109],"to":[110,124,137],"explore":[111],"several":[112],"possible":[113],"tradeoffs":[114],"regarding":[115],"policies":[118],"code":[120],"size.":[121],"When":[122],"compared":[123],"Compressed":[126],"Row":[127],"Storage":[128],"(CRS)":[129],"implementation,":[130],"obtain":[132],"significant":[133],"speedups":[134],"4x.":[138]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
