{"id":"https://openalex.org/W1966068818","doi":"https://doi.org/10.1109/hpcsim.2012.6266920","title":"Network-on-Chip: Challenges for the interconnect and I/O-architecture","display_name":"Network-on-Chip: Challenges for the interconnect and I/O-architecture","publication_year":2012,"publication_date":"2012-07-01","ids":{"openalex":"https://openalex.org/W1966068818","doi":"https://doi.org/10.1109/hpcsim.2012.6266920","mag":"1966068818"},"language":"en","primary_location":{"id":"doi:10.1109/hpcsim.2012.6266920","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcsim.2012.6266920","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Conference on High Performance Computing & Simulation (HPCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061804977","display_name":"Klaus Hofmann","orcid":"https://orcid.org/0000-0002-6675-0221"},"institutions":[{"id":"https://openalex.org/I31512782","display_name":"Technical University of Darmstadt","ror":"https://ror.org/05n911h24","country_code":"DE","type":"education","lineage":["https://openalex.org/I31512782"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Klaus Hofmann","raw_affiliation_strings":["Integrated Electronic Systems Laboratory, Technical University of Darmstadt, Germany","Integrated Electronic Systems Lab, TU Darmstadt, Germany"],"affiliations":[{"raw_affiliation_string":"Integrated Electronic Systems Laboratory, Technical University of Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]},{"raw_affiliation_string":"Integrated Electronic Systems Lab, TU Darmstadt, Germany","institution_ids":["https://openalex.org/I31512782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5061804977"],"corresponding_institution_ids":["https://openalex.org/I31512782"],"apc_list":null,"apc_paid":null,"fwci":0.3546,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.59325988,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"252","last_page":"253"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7712135910987854},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7216311693191528},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6100524663925171},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6007543802261353},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5897437930107117},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5133363604545593},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5072686076164246},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.48146310448646545},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47550755739212036},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.47502025961875916},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.46907418966293335},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.46773725748062134},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4602465033531189},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4163759648799896},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.31758373975753784},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2045668363571167},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.126127690076828},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.0710824728012085}],"concepts":[{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7712135910987854},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7216311693191528},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6100524663925171},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6007543802261353},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5897437930107117},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5133363604545593},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5072686076164246},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.48146310448646545},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47550755739212036},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.47502025961875916},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.46907418966293335},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.46773725748062134},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4602465033531189},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4163759648799896},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.31758373975753784},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2045668363571167},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.126127690076828},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0710824728012085},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/hpcsim.2012.6266920","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcsim.2012.6266920","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 International Conference on High Performance Computing & Simulation (HPCS)","raw_type":"proceedings-article"},{"id":"pmh:oai:tubiblio.ulb.tu-darmstadt.de:124832","is_oa":false,"landing_page_url":"http://tubiblio.ulb.tu-darmstadt.de/124832/","pdf_url":null,"source":{"id":"https://openalex.org/S4377196390","display_name":"TUbilio (Technical University of Darmstadt)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I31512782","host_organization_name":"Technische Universit\u00e4t Darmstadt","host_organization_lineage":["https://openalex.org/I31512782"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Konferenzver\u00f6ffentlichung"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6100000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W1546837845","https://openalex.org/W1967896258","https://openalex.org/W2053373629","https://openalex.org/W2108029854","https://openalex.org/W2113302371","https://openalex.org/W2116602217","https://openalex.org/W2142191952","https://openalex.org/W2149026300","https://openalex.org/W2149935279","https://openalex.org/W2155759572","https://openalex.org/W2160642395","https://openalex.org/W2161266888","https://openalex.org/W2692974053","https://openalex.org/W4233129009","https://openalex.org/W4242948965","https://openalex.org/W6681921686","https://openalex.org/W6728904056","https://openalex.org/W7009969461"],"related_works":["https://openalex.org/W2135981148","https://openalex.org/W2388672758","https://openalex.org/W2065289416","https://openalex.org/W2754086592","https://openalex.org/W2144357574","https://openalex.org/W4230458348","https://openalex.org/W3198758847","https://openalex.org/W1966325333","https://openalex.org/W2108200233","https://openalex.org/W2096946389"],"abstract_inverted_index":{"3D":[0,60],"ICs":[1],"are":[2,45,55,89],"emerging":[3],"as":[4,52,74],"a":[5,26],"promising":[6],"solution":[7],"for":[8,68,77],"scalability,":[9],"power":[10,87],"and":[11,39,85],"performance":[12],"demands":[13],"of":[14,28],"next":[15],"generation":[16],"Systems-on-Chip":[17],"(SoCs).":[18],"Along":[19],"with":[20,30],"the":[21,75],"advantages,":[22],"it":[23],"also":[24,56],"imposes":[25],"number":[27],"challenges":[29,67],"respect":[31],"to":[32,59],"cost,":[33],"technological":[34],"reliability,":[35],"thermal":[36],"budget,":[37],"integration":[38],"so":[40],"forth.":[41],"Networks-on-chips":[42],"(NoCs),":[43],"which":[44],"thoroughly":[46],"investigated":[47],"in":[48],"2D":[49],"SoCs":[50],"design":[51],"scalable":[53],"interconnects,":[54],"well":[57],"relevant":[58],"IC":[61],"Design.":[62],"In":[63],"this":[64],"paper,":[65],"special":[66],"NoC":[69],"interconnect":[70],"architectures":[71],"design,":[72],"such":[73],"need":[76],"high":[78,83],"throughput":[79],"and/or":[80],"low":[81,86],"latency,":[82],"reliability":[84],"consumption,":[88],"presented.":[90]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-02-26T08:16:20.718346","created_date":"2025-10-10T00:00:00"}