{"id":"https://openalex.org/W3086159223","doi":"https://doi.org/10.1109/hpcs48598.2019.9188229","title":"Energy Proportional Heterogenous Computing with Reconfigurable MPSoC","display_name":"Energy Proportional Heterogenous Computing with Reconfigurable MPSoC","publication_year":2019,"publication_date":"2019-07-01","ids":{"openalex":"https://openalex.org/W3086159223","doi":"https://doi.org/10.1109/hpcs48598.2019.9188229","mag":"3086159223"},"language":"en","primary_location":{"id":"doi:10.1109/hpcs48598.2019.9188229","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcs48598.2019.9188229","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on High Performance Computing &amp; Simulation (HPCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005255540","display_name":"Jose Nunez\u2010Yanez","orcid":"https://orcid.org/0000-0002-5153-5481"},"institutions":[{"id":"https://openalex.org/I36234482","display_name":"University of Bristol","ror":"https://ror.org/0524sp257","country_code":"GB","type":"education","lineage":["https://openalex.org/I36234482"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Jose Nunez-Yanez","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of Bristol, Bristol, UK"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of Bristol, Bristol, UK","institution_ids":["https://openalex.org/I36234482"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5005255540"],"corresponding_institution_ids":["https://openalex.org/I36234482"],"apc_list":null,"apc_paid":null,"fwci":0.2408,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.55465693,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.9465538263320923},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6942889094352722},{"id":"https://openalex.org/keywords/energy","display_name":"Energy (signal processing)","score":0.5271703004837036},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4875149428844452},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42960113286972046},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35392677783966064},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.33865678310394287},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.1353760063648224}],"concepts":[{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.9465538263320923},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6942889094352722},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.5271703004837036},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4875149428844452},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42960113286972046},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35392677783966064},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.33865678310394287},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.1353760063648224},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpcs48598.2019.9188229","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcs48598.2019.9188229","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 International Conference on High Performance Computing &amp; Simulation (HPCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2802979210","https://openalex.org/W2901295171"],"related_works":["https://openalex.org/W2076528872","https://openalex.org/W2110564838","https://openalex.org/W1976012348","https://openalex.org/W2214202562","https://openalex.org/W2966924249","https://openalex.org/W2002682434","https://openalex.org/W2140773114","https://openalex.org/W2137671689","https://openalex.org/W2502691491","https://openalex.org/W2262476182"],"abstract_inverted_index":{"Hardware":[0],"heterogeneity":[1],"is":[2,38],"seen":[3],"as":[4,131],"a":[5,81,126],"path":[6],"forward":[7],"for":[8,46],"computers":[9],"to":[10,91],"deliver":[11],"the":[12,20,39,72,84,88,93],"energy":[13,110],"and":[14,78,95,108,116],"performance":[15,107],"computing":[16,49,68,112,123],"improvements":[17],"needed":[18],"over":[19],"next":[21],"decade.":[22],"In":[23,80],"heterogeneous":[24],"architectures,":[25],"specialized":[26],"hardware":[27],"units":[28],"accelerate":[29],"complex":[30],"tasks.":[31],"A":[32],"good":[33],"example":[34],"of":[35,41],"this":[36,101],"trend":[37],"introduction":[40],"GPUs":[42,77],"(Graphics":[43],"Processing":[44],"Units)":[45],"general":[47],"purpose":[48],"combined":[50],"with":[51,71],"multicore":[52],"CPUs.":[53,79],"FPGAs":[54],"(Field":[55],"Programmable":[56],"Gate":[57],"Arrays)":[58],"are":[59],"an":[60],"alternative":[61],"high-performance":[62],"technology":[63],"that":[64,132],"offer":[65],"bit-level":[66],"parallel":[67],"in":[69,76,100],"contrast":[70],"word-level":[73],"parallelism":[74],"deployed":[75],"typical":[82],"configuration,":[83],"host":[85],"CPU":[86],"employs":[87],"FPGA":[89],"accelerator":[90],"offload":[92],"work":[94,102],"then":[96],"remains":[97],"idle":[98],"while":[99],"we":[103],"aim":[104],"at":[105],"improving":[106],"obtaining":[109],"proportional":[111],"via":[113],"simultaneous":[114],"execution":[115],"adaptive":[117],"voltage":[118],"scaling":[119],"on":[120],"all":[121],"available":[122],"engines":[124],"using":[125],"Xilinx":[127],"Zynq":[128],"MPSoC":[129],"device":[130],"target":[133],"device.":[134]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
