{"id":"https://openalex.org/W2076560184","doi":"https://doi.org/10.1109/hpcs.2010.5547070","title":"Application-driven architecture synthesis of on-chip Multiprocessor systems","display_name":"Application-driven architecture synthesis of on-chip Multiprocessor systems","publication_year":2010,"publication_date":"2010-06-01","ids":{"openalex":"https://openalex.org/W2076560184","doi":"https://doi.org/10.1109/hpcs.2010.5547070","mag":"2076560184"},"language":"en","primary_location":{"id":"doi:10.1109/hpcs.2010.5547070","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcs.2010.5547070","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 International Conference on High Performance Computing &amp; Simulation","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081869234","display_name":"Christophe Bobda","orcid":"https://orcid.org/0000-0002-9042-9470"},"institutions":[{"id":"https://openalex.org/I176453806","display_name":"University of Potsdam","ror":"https://ror.org/03bnmw459","country_code":"DE","type":"education","lineage":["https://openalex.org/I176453806"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"C Bobda","raw_affiliation_strings":["Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","institution_ids":["https://openalex.org/I176453806"]},{"raw_affiliation_string":"Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany","institution_ids":["https://openalex.org/I176453806"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070238792","display_name":"Philipp Mahr","orcid":null},"institutions":[{"id":"https://openalex.org/I176453806","display_name":"University of Potsdam","ror":"https://ror.org/03bnmw459","country_code":"DE","type":"education","lineage":["https://openalex.org/I176453806"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"P Mahr","raw_affiliation_strings":["Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","institution_ids":["https://openalex.org/I176453806"]},{"raw_affiliation_string":"Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany","institution_ids":["https://openalex.org/I176453806"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113859775","display_name":"B Andres","orcid":null},"institutions":[{"id":"https://openalex.org/I176453806","display_name":"University of Potsdam","ror":"https://ror.org/03bnmw459","country_code":"DE","type":"education","lineage":["https://openalex.org/I176453806"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"B Andres","raw_affiliation_strings":["Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","institution_ids":["https://openalex.org/I176453806"]},{"raw_affiliation_string":"Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany","institution_ids":["https://openalex.org/I176453806"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027283859","display_name":"Harold Ishebabi","orcid":null},"institutions":[{"id":"https://openalex.org/I176453806","display_name":"University of Potsdam","ror":"https://ror.org/03bnmw459","country_code":"DE","type":"education","lineage":["https://openalex.org/I176453806"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"H Ishebabi","raw_affiliation_strings":["Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Professorship for Computer Engineering, Department of Computer Science, University of Potsdam, Potsdam, Germany","institution_ids":["https://openalex.org/I176453806"]},{"raw_affiliation_string":"Department of Computer Science, University of Potsdam, August-Bebel-Str. 89, D-14482, Germany","institution_ids":["https://openalex.org/I176453806"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I176453806"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.13496933,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"591","last_page":"598"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8256556987762451},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.8024760484695435},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5982881188392639},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5245333313941956},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5037040114402771},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.49855947494506836},{"id":"https://openalex.org/keywords/symmetric-multiprocessor-system","display_name":"Symmetric multiprocessor system","score":0.4829379916191101},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4698293209075928},{"id":"https://openalex.org/keywords/task-parallelism","display_name":"Task parallelism","score":0.4550500810146332},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4520237445831299},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4383397400379181},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.4253283143043518},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4116147756576538}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8256556987762451},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.8024760484695435},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5982881188392639},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5245333313941956},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5037040114402771},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.49855947494506836},{"id":"https://openalex.org/C172430144","wikidata":"https://www.wikidata.org/wiki/Q17111997","display_name":"Symmetric multiprocessor system","level":2,"score":0.4829379916191101},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4698293209075928},{"id":"https://openalex.org/C42992933","wikidata":"https://www.wikidata.org/wiki/Q691169","display_name":"Task parallelism","level":3,"score":0.4550500810146332},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4520237445831299},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4383397400379181},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.4253283143043518},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4116147756576538},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpcs.2010.5547070","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpcs.2010.5547070","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 International Conference on High Performance Computing &amp; Simulation","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6299999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1578455040","https://openalex.org/W1980928473","https://openalex.org/W2005068227","https://openalex.org/W2038509324","https://openalex.org/W2043724035","https://openalex.org/W2107117001","https://openalex.org/W2136058988","https://openalex.org/W2137296867","https://openalex.org/W2159124969","https://openalex.org/W2161267363","https://openalex.org/W2166505938","https://openalex.org/W2167481520","https://openalex.org/W2168277865","https://openalex.org/W4256451539"],"related_works":["https://openalex.org/W2950520577","https://openalex.org/W1501159154","https://openalex.org/W74409296","https://openalex.org/W2003935582","https://openalex.org/W1554644772","https://openalex.org/W305742777","https://openalex.org/W2940653809","https://openalex.org/W2567390125","https://openalex.org/W2468095077","https://openalex.org/W2124295435"],"abstract_inverted_index":{"The":[0,93],"exploitation":[1],"of":[2,7,20,27,41,56,70,83,96,107,128,138],"the":[3,18,39,42,54,57,67,81,84,97,104,108,126,139],"rapid":[4],"growing":[5,28],"field":[6],"Multiprocessor":[8],"on":[9,131],"chip":[10],"requires":[11],"efficient":[12],"design":[13,78,127,140],"methodologies":[14],"and":[15,59,86,110],"tools.":[16],"Besides":[17],"extraction":[19,95],"task":[21],"level":[22],"parallelism,":[23],"architecture":[24,55,88],"synthesis":[25,106],"is":[26,99,134,142],"importance,":[29],"in":[30],"particular":[31],"for":[32,38,80,89,125],"programmable":[33,47,132],"hardware":[34,43],"devices,":[35],"which":[36],"allow":[37],"reuse":[40],"across":[44],"applications.":[45,71],"Using":[46],"devices":[48,133],"to":[49,65],"implement":[50],"on-chip":[51,117,129],"multiprocessor":[52,130],"systems,":[53],"computing":[58,85,109],"communication":[60,87,111,118],"infrastructure":[61],"can":[62],"be":[63],"tailored":[64],"match":[66],"inherent":[68],"parallelism":[69,98],"In":[72],"this":[73],"paper,":[74],"we":[75],"present":[76],"a":[77,90,114,123],"flow":[79],"generation":[82],"given":[91],"application.":[92],"automatic":[94],"presented":[100],"first,":[101],"followed":[102],"by":[103],"application-driven":[105],"architecture.":[112],"Finally,":[113],"light":[115],"weight":[116],"library":[119],"as":[120,122],"well":[121],"tool-chain":[124],"explained.":[135],"Each":[136],"step":[137],"process":[141],"evaluated":[143],"with":[144],"different":[145],"examples.":[146]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
