{"id":"https://openalex.org/W4360831793","doi":"https://doi.org/10.1109/hpca56546.2023.10070981","title":"A Scalable Methodology for Designing Efficient Interconnection Network of Chiplets","display_name":"A Scalable Methodology for Designing Efficient Interconnection Network of Chiplets","publication_year":2023,"publication_date":"2023-02-01","ids":{"openalex":"https://openalex.org/W4360831793","doi":"https://doi.org/10.1109/hpca56546.2023.10070981"},"language":"en","primary_location":{"id":"doi:10.1109/hpca56546.2023.10070981","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca56546.2023.10070981","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043881136","display_name":"Yinxiao Feng","orcid":"https://orcid.org/0000-0002-3637-1132"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yinxiao Feng","raw_affiliation_strings":["Tsinghua University,Institute for Interdisciplinary Information Sciences (IIIS),Beijing,China","Institute for Interdisciplinary Information Sciences (IIIS), Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University,Institute for Interdisciplinary Information Sciences (IIIS),Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Institute for Interdisciplinary Information Sciences (IIIS), Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111439914","display_name":"Dong Xiang","orcid":null},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dong Xiang","raw_affiliation_strings":["Tsinghua University,School of Software,Beijing,China","School of Software, Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University,School of Software,Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"School of Software, Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5006570986","display_name":"Kaisheng Ma","orcid":"https://orcid.org/0000-0001-9226-3366"},"institutions":[{"id":"https://openalex.org/I99065089","display_name":"Tsinghua University","ror":"https://ror.org/03cve4549","country_code":"CN","type":"education","lineage":["https://openalex.org/I99065089"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kaisheng Ma","raw_affiliation_strings":["Tsinghua University,Institute for Interdisciplinary Information Sciences (IIIS),Beijing,China","Institute for Interdisciplinary Information Sciences (IIIS), Tsinghua University, Beijing, China"],"affiliations":[{"raw_affiliation_string":"Tsinghua University,Institute for Interdisciplinary Information Sciences (IIIS),Beijing,China","institution_ids":["https://openalex.org/I99065089"]},{"raw_affiliation_string":"Institute for Interdisciplinary Information Sciences (IIIS), Tsinghua University, Beijing, China","institution_ids":["https://openalex.org/I99065089"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5043881136"],"corresponding_institution_ids":["https://openalex.org/I99065089"],"apc_list":null,"apc_paid":null,"fwci":6.6577,"has_fulltext":false,"cited_by_count":33,"citation_normalized_percentile":{"value":0.97155803,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"1059","last_page":"1071"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10179","display_name":"Supercapacitor Materials and Fabrication","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2504","display_name":"Electronic, Optical and Magnetic Materials"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8161641359329224},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.7521512508392334},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.6222336292266846},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5940170884132385},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.5689281225204468},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.44969022274017334},{"id":"https://openalex.org/keywords/multistage-interconnection-networks","display_name":"Multistage interconnection networks","score":0.4476197063922882},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4365870952606201},{"id":"https://openalex.org/keywords/deadlock","display_name":"Deadlock","score":0.4265497326850891},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.42585915327072144},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22041326761245728}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8161641359329224},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.7521512508392334},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.6222336292266846},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5940170884132385},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.5689281225204468},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.44969022274017334},{"id":"https://openalex.org/C2776832011","wikidata":"https://www.wikidata.org/wiki/Q6935099","display_name":"Multistage interconnection networks","level":3,"score":0.4476197063922882},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4365870952606201},{"id":"https://openalex.org/C159023740","wikidata":"https://www.wikidata.org/wiki/Q623276","display_name":"Deadlock","level":2,"score":0.4265497326850891},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.42585915327072144},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22041326761245728},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpca56546.2023.10070981","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca56546.2023.10070981","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE International Symposium on High-Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":51,"referenced_works":["https://openalex.org/W1501077214","https://openalex.org/W1573851380","https://openalex.org/W1770019236","https://openalex.org/W1965320180","https://openalex.org/W1965678465","https://openalex.org/W1975444747","https://openalex.org/W2033685033","https://openalex.org/W2118231264","https://openalex.org/W2124906592","https://openalex.org/W2125357468","https://openalex.org/W2132258839","https://openalex.org/W2144357574","https://openalex.org/W2148371977","https://openalex.org/W2154323564","https://openalex.org/W2174142125","https://openalex.org/W2344873464","https://openalex.org/W2417885434","https://openalex.org/W2532719504","https://openalex.org/W2607241962","https://openalex.org/W2884166449","https://openalex.org/W2980104813","https://openalex.org/W2999356938","https://openalex.org/W3016212306","https://openalex.org/W3092240006","https://openalex.org/W3094554961","https://openalex.org/W3111684448","https://openalex.org/W3112773671","https://openalex.org/W3134495297","https://openalex.org/W3135235705","https://openalex.org/W3137477516","https://openalex.org/W3157297576","https://openalex.org/W3169463464","https://openalex.org/W3186384115","https://openalex.org/W3188178661","https://openalex.org/W3192636176","https://openalex.org/W3211226062","https://openalex.org/W3211730428","https://openalex.org/W3216238950","https://openalex.org/W4210550999","https://openalex.org/W4210984760","https://openalex.org/W4220694664","https://openalex.org/W4220769636","https://openalex.org/W4231624695","https://openalex.org/W4235172414","https://openalex.org/W4235977080","https://openalex.org/W4254602193","https://openalex.org/W4280498518","https://openalex.org/W4293023438","https://openalex.org/W4297097318","https://openalex.org/W4297097426","https://openalex.org/W4297097450"],"related_works":["https://openalex.org/W2081032080","https://openalex.org/W2189226368","https://openalex.org/W2134733504","https://openalex.org/W4321520003","https://openalex.org/W2144460576","https://openalex.org/W2264708074","https://openalex.org/W3147216279","https://openalex.org/W4243279819","https://openalex.org/W311319973","https://openalex.org/W2346543366"],"abstract_inverted_index":{"The":[0,147,162],"Chiplet":[1],"methodology":[2,138],"can":[3,73,139],"accelerate":[4],"VLSI":[5],"system":[6],"development":[7],"and":[8,24,51,64,89,116,122,171],"provide":[9],"better":[10],"flexibility.":[11],"However,":[12],"it":[13],"is":[14,108,167,176],"not":[15],"easy":[16],"to":[17,110,169,178],"build":[18],"interconnection":[19,70,77,100],"networks":[20,39,78],"across":[21],"multiple":[22],"chiplets":[23,149],"maintain":[25],"high-performance":[26],"deadlock-free":[27,85],"routing":[28,87,134],"in":[29,135,144],"systems":[30],"of":[31,60],"various":[32,145],"hierarchical":[33],"topologies.":[34],"In":[35],"particular,":[36],"most":[37],"on-chiplet":[38],"are":[40,49,95],"based":[41],"on":[42,125],"flat":[43],"topologies":[44],"such":[45],"as":[46],"2D-mesh,":[47,136],"which":[48],"inflexible":[50],"insufficient":[52],"for":[53,97],"large-scale":[54],"multi-chiplet":[55,62,99],"systems.To":[56],"take":[57],"full":[58],"advantage":[59],"the":[61,112,152,155,172],"architecture":[63],"advanced":[65],"packaging,":[66],"we":[67],"propose":[68],"an":[69],"method":[71,156],"that":[72],"flexibly":[74],"establish":[75],"high-radix":[76],"from":[79],"typical":[80],"2D-mesh-NoC-based":[81],"chiplets.":[82],"A":[83],"minus-first-based":[84],"adaptive":[86,133],"algorithm":[88],"a":[90,103,126],"safe/unsafe":[91],"flow":[92],"control":[93],"policy":[94],"introduced":[96],"these":[98],"networks.":[101],"Additionally,":[102],"general":[104],"approach":[105],"network":[106,142],"interleaving":[107],"used":[109],"balance":[111],"communication":[113],"bandwidth":[114],"within":[115],"between":[117],"chiplets.We":[118],"evaluate":[119],"different":[120],"architectures":[121],"traffic":[123],"patterns":[124],"cycle-accurate":[127],"C++":[128],"simulator.":[129],"Compared":[130],"with":[131],"traditional":[132],"our":[137],"significantly":[140],"improve":[141],"performance":[143],"cases.":[146],"more":[148,153],"there":[150],"are,":[151],"effective":[154],"is.":[157],"For":[158],"64":[159],"4\u00d74-2D-mesh-based":[160],"chiplets,":[161],"maximum":[163],"injection":[164],"rate":[165],"increase":[166],"up":[168,177],"2\u00d7,":[170],"average":[173],"latency":[174],"reduction":[175],"45%.":[179]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":13},{"year":2024,"cited_by_count":14},{"year":2023,"cited_by_count":2}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}