{"id":"https://openalex.org/W4280496502","doi":"https://doi.org/10.1109/hpca53966.2022.00082","title":"TransPIM: A Memory-based Acceleration via Software-Hardware Co-Design for Transformer","display_name":"TransPIM: A Memory-based Acceleration via Software-Hardware Co-Design for Transformer","publication_year":2022,"publication_date":"2022-04-01","ids":{"openalex":"https://openalex.org/W4280496502","doi":"https://doi.org/10.1109/hpca53966.2022.00082"},"language":"en","primary_location":{"id":"doi:10.1109/hpca53966.2022.00082","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca53966.2022.00082","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036778557","display_name":"Minxuan Zhou","orcid":"https://orcid.org/0000-0002-5523-7270"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Minxuan Zhou","raw_affiliation_strings":["University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039571679","display_name":"Weihong Xu","orcid":"https://orcid.org/0000-0003-3766-3353"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Weihong Xu","raw_affiliation_strings":["University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072579616","display_name":"Jaeyoung Kang","orcid":"https://orcid.org/0000-0003-1048-1285"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jaeyoung Kang","raw_affiliation_strings":["University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025573294","display_name":"Tajana Rosing","orcid":"https://orcid.org/0000-0002-6954-997X"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Tajana Rosing","raw_affiliation_strings":["University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of California, San Diego,Department of Computer Science and Engineering,La Jolla,CA,United States","institution_ids":["https://openalex.org/I36258959"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I36258959"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":131,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1071","last_page":"1085"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9941999912261963,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8007094860076904},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.652570366859436},{"id":"https://openalex.org/keywords/memory-footprint","display_name":"Memory footprint","score":0.602220356464386},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.5166769027709961},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5137490034103394},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.500964879989624},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.490147203207016},{"id":"https://openalex.org/keywords/extended-memory","display_name":"Extended memory","score":0.43366196751594543},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4328599274158478},{"id":"https://openalex.org/keywords/auxiliary-memory","display_name":"Auxiliary memory","score":0.41797778010368347},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3724570572376251},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.35731497406959534},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.19792956113815308},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15481621026992798}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8007094860076904},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.652570366859436},{"id":"https://openalex.org/C74912251","wikidata":"https://www.wikidata.org/wiki/Q6815727","display_name":"Memory footprint","level":2,"score":0.602220356464386},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.5166769027709961},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5137490034103394},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.500964879989624},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.490147203207016},{"id":"https://openalex.org/C171675096","wikidata":"https://www.wikidata.org/wiki/Q1143380","display_name":"Extended memory","level":4,"score":0.43366196751594543},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4328599274158478},{"id":"https://openalex.org/C82687282","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Auxiliary memory","level":2,"score":0.41797778010368347},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3724570572376251},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.35731497406959534},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.19792956113815308},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15481621026992798}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpca53966.2022.00082","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca53966.2022.00082","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.4099999964237213}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":59,"referenced_works":["https://openalex.org/W1598796236","https://openalex.org/W1981943579","https://openalex.org/W2034861439","https://openalex.org/W2073748734","https://openalex.org/W2113459411","https://openalex.org/W2514838290","https://openalex.org/W2606722458","https://openalex.org/W2761132374","https://openalex.org/W2765234579","https://openalex.org/W2766489088","https://openalex.org/W2791186466","https://openalex.org/W2801000640","https://openalex.org/W2896090304","https://openalex.org/W2896457183","https://openalex.org/W2909331201","https://openalex.org/W2940862705","https://openalex.org/W2949591530","https://openalex.org/W2949989598","https://openalex.org/W2963339397","https://openalex.org/W2963926728","https://openalex.org/W2965373594","https://openalex.org/W2979874885","https://openalex.org/W2980200167","https://openalex.org/W2980688670","https://openalex.org/W2996264288","https://openalex.org/W3015468748","https://openalex.org/W3016166938","https://openalex.org/W3093557412","https://openalex.org/W3094502228","https://openalex.org/W3096609285","https://openalex.org/W3100710793","https://openalex.org/W3100985894","https://openalex.org/W3103415979","https://openalex.org/W3103837983","https://openalex.org/W3126721948","https://openalex.org/W3130716829","https://openalex.org/W3133347161","https://openalex.org/W3134274954","https://openalex.org/W3146763006","https://openalex.org/W3159727696","https://openalex.org/W3205088407","https://openalex.org/W3207087741","https://openalex.org/W3213412675","https://openalex.org/W4287704453","https://openalex.org/W4288083528","https://openalex.org/W4295838474","https://openalex.org/W4385245566","https://openalex.org/W6635679246","https://openalex.org/W6676984168","https://openalex.org/W6739901393","https://openalex.org/W6755207826","https://openalex.org/W6766673545","https://openalex.org/W6771626834","https://openalex.org/W6771915120","https://openalex.org/W6776048684","https://openalex.org/W6781533629","https://openalex.org/W6784333009","https://openalex.org/W6786756943","https://openalex.org/W6790307280"],"related_works":["https://openalex.org/W3008068282","https://openalex.org/W1580607742","https://openalex.org/W2130320819","https://openalex.org/W4210611780","https://openalex.org/W2345611555","https://openalex.org/W2062140197","https://openalex.org/W2154737700","https://openalex.org/W4393076761","https://openalex.org/W2544746963","https://openalex.org/W4293811827"],"abstract_inverted_index":{"Transformer-based":[0,156],"models":[1,82],"are":[2,50],"state-of-the-art":[3],"for":[4,79,103,154],"many":[5],"machine":[6],"learning":[7],"(ML)":[8],"tasks.":[9],"Executing":[10],"Transformer":[11,54,104],"usually":[12],"requires":[13],"a":[14,100,115],"long":[15],"execution":[16],"time":[17],"due":[18],"to":[19,52,118,145,165,174,180],"the":[20,25,31,36,67,89,111,120,131,138],"large":[21],"memory":[22,32,59,142],"footprint":[23],"and":[24,46,62,77,107,150,185],"low":[26],"data":[27,123,152],"reuse":[28],"rate,":[29],"stressing":[30],"system":[33],"while":[34],"under-utilizing":[35],"computing":[37,48],"resources.":[38],"Memory-based":[39],"processing":[40,43,149],"technologies,":[41],"including":[42],"in-memory":[44],"(PIM)":[45],"near-memory":[47],"(NMC),":[49],"promising":[51],"accelerate":[53],"since":[55],"they":[56],"provide":[57],"high":[58,140],"bandwidth":[60,141],"utilization":[61],"extensive":[63],"computation":[64],"parallelism.":[65],"However,":[66],"previous":[68,127],"memory-based":[69,101,170],"ML":[70,81],"accelerators":[71],"mainly":[72],"target":[73],"at":[74],"optimizing":[75],"dataflow":[76,117],"hardware":[78,108],"compute-intensive":[80],"(e.g.,":[83],"CNNs),":[84],"which":[85],"do":[86],"not":[87],"fit":[88],"memory-intensive":[90],"characteristics":[91],"of":[92],"Transformer.":[93],"In":[94,110,130],"this":[95],"work,":[96],"we":[97],"propose":[98],"TransPIM,":[99],"acceleration":[102],"using":[105],"software":[106],"co-design.":[109],"software-level,":[112],"TransPIM":[113,133,162,177],"adopts":[114],"token-based":[116],"avoid":[119],"expensive":[121],"inter-layer":[122],"movements":[124],"introduced":[125],"by":[126],"layer-based":[128],"dataflow.":[129],"hardware-level,":[132],"introduces":[134],"lightweight":[135],"modifications":[136],"in":[137],"conventional":[139,175],"(HBM)":[143],"architecture":[144],"support":[146],"PIM-NMC":[147],"hybrid":[148],"efficient":[151],"communication":[153],"accelerating":[155],"models.":[157],"Our":[158],"experiments":[159],"show":[160],"that":[161],"is":[163,178],"3.7\u00d7":[164],"9.1\u00d7":[166],"faster":[167,182],"than":[168,183,190],"existing":[169,191],"acceleration.":[171],"As":[172],"compared":[173],"accelerators,":[176],"22.1\u00d7":[179],"114.9\u00d7":[181],"GPUs":[184],"provides":[186],"2.0\u00d7":[187],"more":[188],"throughput":[189],"ASIC-based":[192],"accelerators.":[193]},"counts_by_year":[{"year":2026,"cited_by_count":20},{"year":2025,"cited_by_count":63},{"year":2024,"cited_by_count":38},{"year":2023,"cited_by_count":8},{"year":2022,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
