{"id":"https://openalex.org/W2051265981","doi":"https://doi.org/10.1109/hpca.2015.7056045","title":"High performing cache hierarchies for server workloads: Relaxing inclusion to capture the latency benefits of exclusive caches","display_name":"High performing cache hierarchies for server workloads: Relaxing inclusion to capture the latency benefits of exclusive caches","publication_year":2015,"publication_date":"2015-02-01","ids":{"openalex":"https://openalex.org/W2051265981","doi":"https://doi.org/10.1109/hpca.2015.7056045","mag":"2051265981"},"language":"en","primary_location":{"id":"doi:10.1109/hpca.2015.7056045","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2015.7056045","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078825915","display_name":"Aamer Jaleel","orcid":"https://orcid.org/0000-0002-5709-2992"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Aamer Jaleel","raw_affiliation_strings":["Intel Corporation","VSSAD, Hudson, MA","Intel\u00ae Corporation, Hudson, MA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"VSSAD, Hudson, MA","institution_ids":[]},{"raw_affiliation_string":"Intel\u00ae Corporation, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046906937","display_name":"Joseph Nuzman","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Joseph Nuzman","raw_affiliation_strings":["Intel Corporation","Intel\u00ae Corporation, Hudson, MA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel\u00ae Corporation, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037961141","display_name":"Adrian Moga","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Adrian Moga","raw_affiliation_strings":["Intel Corporation","Intel\u00ae Corporation, Hudson, MA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"Intel\u00ae Corporation, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048387429","display_name":"Simon C. Steely","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Simon C. Steely","raw_affiliation_strings":["Intel Corporation","VSSAD, Hudson, MA","Intel\u00ae Corporation, Hudson, MA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]},{"raw_affiliation_string":"VSSAD, Hudson, MA","institution_ids":[]},{"raw_affiliation_string":"Intel\u00ae Corporation, Hudson, MA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5024384625","display_name":"Joel Emer","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]},{"id":"https://openalex.org/I63966007","display_name":"Massachusetts Institute of Technology","ror":"https://ror.org/042nb2s44","country_code":"US","type":"education","lineage":["https://openalex.org/I63966007"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Joel Emer","raw_affiliation_strings":["Massachusetts Institute of Technology (MIT), Cambridge, MA","NVIDIA Research, Westford, MA","Massachusetts Inst. of Tech (MIT), Cambridge, MA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Massachusetts Institute of Technology (MIT), Cambridge, MA","institution_ids":["https://openalex.org/I63966007"]},{"raw_affiliation_string":"NVIDIA Research, Westford, MA","institution_ids":["https://openalex.org/I4210127875"]},{"raw_affiliation_string":"Massachusetts Inst. of Tech (MIT), Cambridge, MA","institution_ids":["https://openalex.org/I63966007"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":44,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"343","last_page":"353"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8247852325439453},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7903290390968323},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.7853203415870667},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.715361475944519},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.664384663105011},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.6633816957473755},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.6564954519271851},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.6241521239280701},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.5336231589317322},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4896083474159241},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4671097993850708},{"id":"https://openalex.org/keywords/working-set","display_name":"Working set","score":0.4625169038772583},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4328683614730835},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4207952916622162},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3270263671875},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.056184351444244385}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8247852325439453},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7903290390968323},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.7853203415870667},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.715361475944519},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.664384663105011},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.6633816957473755},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.6564954519271851},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.6241521239280701},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.5336231589317322},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4896083474159241},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4671097993850708},{"id":"https://openalex.org/C88196245","wikidata":"https://www.wikidata.org/wiki/Q8034984","display_name":"Working set","level":2,"score":0.4625169038772583},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4328683614730835},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4207952916622162},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3270263671875},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.056184351444244385}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpca.2015.7056045","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2015.7056045","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/10","display_name":"Reduced inequalities","score":0.5600000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":37,"referenced_works":["https://openalex.org/W134133860","https://openalex.org/W2029577083","https://openalex.org/W2046996113","https://openalex.org/W2082437541","https://openalex.org/W2095258606","https://openalex.org/W2097336080","https://openalex.org/W2100741459","https://openalex.org/W2114509705","https://openalex.org/W2120072148","https://openalex.org/W2120974992","https://openalex.org/W2124350608","https://openalex.org/W2126603366","https://openalex.org/W2131840272","https://openalex.org/W2132960876","https://openalex.org/W2134863171","https://openalex.org/W2135232880","https://openalex.org/W2140136554","https://openalex.org/W2141181087","https://openalex.org/W2143285027","https://openalex.org/W2146296339","https://openalex.org/W2150054597","https://openalex.org/W2150196852","https://openalex.org/W2155350341","https://openalex.org/W2160806112","https://openalex.org/W2160996172","https://openalex.org/W2161364792","https://openalex.org/W2165113127","https://openalex.org/W2171164959","https://openalex.org/W2243416539","https://openalex.org/W4211025971","https://openalex.org/W4236225749","https://openalex.org/W4239302855","https://openalex.org/W4243587504","https://openalex.org/W4247641071","https://openalex.org/W6678902981","https://openalex.org/W6679546289","https://openalex.org/W6680562660"],"related_works":["https://openalex.org/W2161101294","https://openalex.org/W2148571123","https://openalex.org/W2026179701","https://openalex.org/W4380881125","https://openalex.org/W2184371594","https://openalex.org/W2302406141","https://openalex.org/W4312759433","https://openalex.org/W2365803410","https://openalex.org/W2108638805","https://openalex.org/W2152423944"],"abstract_inverted_index":{"Increasing":[0],"transistor":[1],"density":[2],"enables":[3],"adding":[4],"more":[5,11],"on-die":[6],"cache":[7,31,56,87,100,135,139,178,193,208],"real-estate":[8],"However,":[9],"devoting":[10],"space":[12],"to":[13,23,29,78,119,188,203],"the":[14,19,43,67,74,80,97,103,113,128,165],"shared":[15,30,55,81,107],"last-level-cache":[16],"(LLC)":[17],"causes":[18],"memory":[20,26],"latency":[21,28,89],"bottleneck":[22],"move":[24],"from":[25,149],"access":[27,32,57,88,140],"latency.":[33,58,141],"As":[34],"such,":[35],"applications":[36],"whose":[37,92],"working":[38,93],"set":[39,94],"is":[40,118,158],"larger":[41,98],"than":[42],"smaller":[44,70],"caches":[45,72,117,163],"spend":[46],"a":[47,106,173],"large":[48,154,161,166],"fraction":[49],"of":[50,69,105,111,115,169,206],"their":[51],"execution":[52],"time":[53],"on":[54],"To":[59],"address":[60],"this":[61,63],"problem,":[62],"paper":[64,196],"investigates":[65],"increasing":[66,79,112],"size":[68,114],"private":[71,99,116,155,162],"in":[73],"hierarchy":[75,136,152,179],"as":[76,186],"opposed":[77],"LLC.":[82,108],"Doing":[83],"so":[84],"improves":[85,180],"average":[86],"for":[90,127,200],"workloads":[91,146],"fits":[95],"into":[96],"while":[101],"retaining":[102],"benefits":[104],"The":[109,195],"consequence":[110],"relax":[120],"inclusion":[121],"and":[122],"build":[123],"exclusive":[124,134,151,177,207],"hierarchies.":[125,209],"Thus,":[126],"same":[129],"total":[130],"caching":[131],"capacity,":[132],"an":[133,150,176,189],"provides":[137],"better":[138],"We":[142],"observe":[143],"that":[144],"server":[145,170,181],"benefit":[147],"tremendously":[148],"with":[153],"caches.":[156],"This":[157],"primarily":[159],"because":[160],"accommodate":[164],"code":[167],"working-sets":[168],"workloads.":[171],"For":[172],"16-core":[174],"CMP,":[175],"workload":[182],"performance":[183,205],"by":[184],"5-12%":[185],"compared":[187],"equal":[190],"capacity":[191],"inclusive":[192],"hierarchy.":[194],"also":[197],"presents":[198],"directions":[199],"further":[201],"research":[202],"maximize":[204]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":7},{"year":2017,"cited_by_count":7},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}