{"id":"https://openalex.org/W2067441262","doi":"https://doi.org/10.1109/hpca.2014.6835938","title":"MRPB: Memory request prioritization for massively parallel processors","display_name":"MRPB: Memory request prioritization for massively parallel processors","publication_year":2014,"publication_date":"2014-02-01","ids":{"openalex":"https://openalex.org/W2067441262","doi":"https://doi.org/10.1109/hpca.2014.6835938","mag":"2067441262"},"language":"en","primary_location":{"id":"doi:10.1109/hpca.2014.6835938","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2014.6835938","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068789333","display_name":"Wenhao Jia","orcid":"https://orcid.org/0000-0002-9699-0744"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Wenhao Jia","raw_affiliation_strings":["Princeton University","Princeton University, USA"],"affiliations":[{"raw_affiliation_string":"Princeton University","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Princeton University, USA","institution_ids":["https://openalex.org/I20089843"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103504814","display_name":"Kelly A. Shaw","orcid":null},"institutions":[{"id":"https://openalex.org/I158012942","display_name":"University of Richmond","ror":"https://ror.org/03y71xh61","country_code":"US","type":"education","lineage":["https://openalex.org/I158012942"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kelly A. Shaw","raw_affiliation_strings":["University of Richmond","University of Richmond, USA"],"affiliations":[{"raw_affiliation_string":"University of Richmond","institution_ids":["https://openalex.org/I158012942"]},{"raw_affiliation_string":"University of Richmond, USA","institution_ids":["https://openalex.org/I158012942"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002015508","display_name":"Margaret Martonosi","orcid":"https://orcid.org/0000-0001-9683-8032"},"institutions":[{"id":"https://openalex.org/I20089843","display_name":"Princeton University","ror":"https://ror.org/00hx57361","country_code":"US","type":"education","lineage":["https://openalex.org/I20089843"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Margaret Martonosi","raw_affiliation_strings":["Princeton University","Princeton University, USA"],"affiliations":[{"raw_affiliation_string":"Princeton University","institution_ids":["https://openalex.org/I20089843"]},{"raw_affiliation_string":"Princeton University, USA","institution_ids":["https://openalex.org/I20089843"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5068789333"],"corresponding_institution_ids":["https://openalex.org/I20089843"],"apc_list":null,"apc_paid":null,"fwci":26.3571,"has_fulltext":false,"cited_by_count":155,"citation_normalized_percentile":{"value":0.99858081,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"272","last_page":"283"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8903131484985352},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.8019641637802124},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.7465261220932007},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7445393800735474},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7443747520446777},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.6839414834976196},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.5704993605613708},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.5667195320129395},{"id":"https://openalex.org/keywords/massively-parallel","display_name":"Massively parallel","score":0.5558390617370605},{"id":"https://openalex.org/keywords/cache-oblivious-algorithm","display_name":"Cache-oblivious algorithm","score":0.47832751274108887},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.45410072803497314},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.45269256830215454},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.44516652822494507},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.355399489402771}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8903131484985352},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.8019641637802124},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.7465261220932007},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7445393800735474},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7443747520446777},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.6839414834976196},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.5704993605613708},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.5667195320129395},{"id":"https://openalex.org/C190475519","wikidata":"https://www.wikidata.org/wiki/Q544384","display_name":"Massively parallel","level":2,"score":0.5558390617370605},{"id":"https://openalex.org/C59687516","wikidata":"https://www.wikidata.org/wiki/Q5015938","display_name":"Cache-oblivious algorithm","level":5,"score":0.47832751274108887},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.45410072803497314},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.45269256830215454},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.44516652822494507},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.355399489402771}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpca.2014.6835938","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2014.6835938","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 20th International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.5799999833106995,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320309480","display_name":"Nvidia","ror":"https://ror.org/03jdj4y14"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":26,"referenced_works":["https://openalex.org/W1979527452","https://openalex.org/W2016352575","https://openalex.org/W2020572638","https://openalex.org/W2029577083","https://openalex.org/W2047060659","https://openalex.org/W2072768743","https://openalex.org/W2080285119","https://openalex.org/W2080592089","https://openalex.org/W2090584832","https://openalex.org/W2096661534","https://openalex.org/W2100011668","https://openalex.org/W2105937753","https://openalex.org/W2115172404","https://openalex.org/W2126570805","https://openalex.org/W2128120785","https://openalex.org/W2146451305","https://openalex.org/W2150953684","https://openalex.org/W2151142801","https://openalex.org/W2156831150","https://openalex.org/W2164333604","https://openalex.org/W2166918318","https://openalex.org/W2464177207","https://openalex.org/W3103339143","https://openalex.org/W6662225327","https://openalex.org/W6677264922","https://openalex.org/W6719768283"],"related_works":["https://openalex.org/W2098406302","https://openalex.org/W2535115842","https://openalex.org/W2734782074","https://openalex.org/W2546991807","https://openalex.org/W2020176098","https://openalex.org/W2006655698","https://openalex.org/W2436169747","https://openalex.org/W2121191383","https://openalex.org/W4252570104","https://openalex.org/W2076114130"],"abstract_inverted_index":{"Massively":[0],"parallel,":[1],"throughput-oriented":[2],"systems":[3],"such":[4],"as":[5],"graphics":[6],"processing":[7],"units":[8],"(GPUs)":[9],"offer":[10],"high":[11,73],"performance":[12,63,158],"for":[13],"a":[14,118,128,149,172],"broad":[15],"range":[16],"of":[17,27,100,142,159],"programs.":[18],"They":[19],"are,":[20],"however,":[21],"complex":[22],"to":[23,45,66,86],"program,":[24],"especially":[25],"because":[26],"their":[28],"intricate":[29],"memory":[30,50,81,113],"hierarchies":[31],"with":[32],"multiple":[33],"address":[34],"spaces.":[35],"In":[36],"response,":[37],"modern":[38],"GPUs":[39],"have":[40,59],"widely":[41],"adopted":[42],"caches,":[43],"hoping":[44],"providing":[46],"smoother":[47],"reductions":[48],"in":[49,76,127],"access":[51,117],"traffic":[52],"and":[53,90,110,139,163,168],"latency.":[54],"Unfortunately,":[55],"GPU":[56,88,92,174],"caches":[57],"often":[58],"mixed":[60],"or":[61],"unpredictable":[62],"impact":[64],"due":[65],"cache":[67,111,126,137,146,175],"contention":[68,138],"that":[69],"results":[70],"from":[71],"the":[72,80,125,143,156,160],"thread":[74],"counts":[75],"GPUs.":[77],"We":[78],"propose":[79],"request":[82],"prioritization":[83,107],"buffer":[84],"(MRPB)":[85],"ease":[87],"programming":[89],"improve":[91],"performance.":[93],"This":[94],"hardware":[95],"structure":[96],"improves":[97,155],"caching":[98],"efficiency":[99],"massively":[101],"parallel":[102],"workloads":[103],"by":[104,166],"applying":[105],"two":[106],"methods-request":[108],"reordering":[109],"bypassing-to":[112],"requests":[114,123],"before":[115],"they":[116],"cache.":[119],"MRPB":[120,154],"then":[121],"releases":[122],"into":[124],"more":[129],"cache-friendly":[130],"order.":[131],"The":[132],"result":[133],"is":[134],"drastically":[135],"reduced":[136],"improved":[140],"use":[141],"limited":[144],"per-thread":[145],"capacity.":[147],"For":[148],"simulated":[150],"16KB":[151],"L1":[152],"cache,":[153],"average":[157],"entire":[161],"PolyBench":[162],"Rodinia":[164],"suites":[165],"2.65\u00d7":[167],"1.27\u00d7":[169],"respectively,":[170],"outperforming":[171],"state-of-the-art":[173],"management":[176],"technique.":[177]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":15},{"year":2018,"cited_by_count":28},{"year":2017,"cited_by_count":22},{"year":2016,"cited_by_count":32},{"year":2015,"cited_by_count":24},{"year":2014,"cited_by_count":8}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}