{"id":"https://openalex.org/W1997352364","doi":"https://doi.org/10.1109/hpca.2013.6522351","title":"Cache coherence for GPU architectures","display_name":"Cache coherence for GPU architectures","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W1997352364","doi":"https://doi.org/10.1109/hpca.2013.6522351","mag":"1997352364"},"language":"en","primary_location":{"id":"doi:10.1109/hpca.2013.6522351","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2013.6522351","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101848498","display_name":"Imraj Singh","orcid":"https://orcid.org/0000-0003-2186-0977"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"I. Singh","raw_affiliation_strings":["University of British Columbia, USA","Univ of British Columbia, Vancouver, BC, Canada"],"affiliations":[{"raw_affiliation_string":"University of British Columbia, USA","institution_ids":[]},{"raw_affiliation_string":"Univ of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035046431","display_name":"Arrvindh Shriraman","orcid":"https://orcid.org/0000-0001-8466-5701"},"institutions":[{"id":"https://openalex.org/I18014758","display_name":"Simon Fraser University","ror":"https://ror.org/0213rcc28","country_code":"CA","type":"education","lineage":["https://openalex.org/I18014758"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"A. Shriraman","raw_affiliation_strings":["Simon Fraser University, Canada","[Simon Fraser University Burnaby, BC, Canada]"],"affiliations":[{"raw_affiliation_string":"Simon Fraser University, Canada","institution_ids":["https://openalex.org/I18014758"]},{"raw_affiliation_string":"[Simon Fraser University Burnaby, BC, Canada]","institution_ids":["https://openalex.org/I18014758"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103585845","display_name":"Wilson Wai Lun Fung","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"W. W. L. Fung","raw_affiliation_strings":["University of British Columbia, USA","Univ of British Columbia, Vancouver, BC, Canada"],"affiliations":[{"raw_affiliation_string":"University of British Columbia, USA","institution_ids":[]},{"raw_affiliation_string":"Univ of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055699570","display_name":"Mike O\u2019Connor","orcid":"https://orcid.org/0000-0003-0944-2393"},"institutions":[{"id":"https://openalex.org/I1311921367","display_name":"Advanced Micro Devices (Canada)","ror":"https://ror.org/02yh0k313","country_code":"CA","type":"company","lineage":["https://openalex.org/I1311921367","https://openalex.org/I4210137977"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"M. O'Connor","raw_affiliation_strings":["Advanced Micro Devices, Inc. (AMD)","Advanced Micro Devices, Inc. (AMD), USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Advanced Micro Devices, Inc. (AMD)","institution_ids":["https://openalex.org/I1311921367"]},{"raw_affiliation_string":"Advanced Micro Devices, Inc. (AMD), USA#TAB#","institution_ids":["https://openalex.org/I1311921367"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026788167","display_name":"Tor M. Aamodt","orcid":"https://orcid.org/0000-0003-1161-692X"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"T. M. Aamodt","raw_affiliation_strings":["Stanford University, USA","University of British Columbia, USA","Stanford University Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"Stanford University, USA","institution_ids":["https://openalex.org/I97018004"]},{"raw_affiliation_string":"University of British Columbia, USA","institution_ids":[]},{"raw_affiliation_string":"Stanford University Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101848498"],"corresponding_institution_ids":["https://openalex.org/I141945490"],"apc_list":null,"apc_paid":null,"fwci":21.523,"has_fulltext":false,"cited_by_count":160,"citation_normalized_percentile":{"value":0.99681309,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"578","last_page":"590"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8773356676101685},{"id":"https://openalex.org/keywords/mesi-protocol","display_name":"MESI protocol","score":0.8601430058479309},{"id":"https://openalex.org/keywords/cache-coherence","display_name":"Cache coherence","score":0.8536134958267212},{"id":"https://openalex.org/keywords/mesif-protocol","display_name":"MESIF protocol","score":0.7263602018356323},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6256293058395386},{"id":"https://openalex.org/keywords/coherence","display_name":"Coherence (philosophical gambling strategy)","score":0.5448470115661621},{"id":"https://openalex.org/keywords/bus-sniffing","display_name":"Bus sniffing","score":0.5167199969291687},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5106380581855774},{"id":"https://openalex.org/keywords/protocol","display_name":"Protocol (science)","score":0.5001571178436279},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.4824657738208771},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.4106517434120178},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.38857725262641907},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33340615034103394},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.2971254885196686},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.2962353825569153},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23897728323936462}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8773356676101685},{"id":"https://openalex.org/C120936851","wikidata":"https://www.wikidata.org/wiki/Q1408065","display_name":"MESI protocol","level":5,"score":0.8601430058479309},{"id":"https://openalex.org/C141917322","wikidata":"https://www.wikidata.org/wiki/Q1025017","display_name":"Cache coherence","level":5,"score":0.8536134958267212},{"id":"https://openalex.org/C199979278","wikidata":"https://www.wikidata.org/wiki/Q263221","display_name":"MESIF protocol","level":5,"score":0.7263602018356323},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6256293058395386},{"id":"https://openalex.org/C2781181686","wikidata":"https://www.wikidata.org/wiki/Q4226068","display_name":"Coherence (philosophical gambling strategy)","level":2,"score":0.5448470115661621},{"id":"https://openalex.org/C51185590","wikidata":"https://www.wikidata.org/wiki/Q1017228","display_name":"Bus sniffing","level":5,"score":0.5167199969291687},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5106380581855774},{"id":"https://openalex.org/C2780385302","wikidata":"https://www.wikidata.org/wiki/Q367158","display_name":"Protocol (science)","level":3,"score":0.5001571178436279},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.4824657738208771},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.4106517434120178},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.38857725262641907},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33340615034103394},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.2971254885196686},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.2962353825569153},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23897728323936462},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/hpca.2013.6522351","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2013.6522351","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.728.6146","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.728.6146","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.ubc.ca/%7Eaamodt/papers/isingh.hpca2013.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.897.7660","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.897.7660","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://cs.olemiss.edu/heroes/gpu_cache_coherency_hpca2013.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320307757","display_name":"Advanced Micro Devices","ror":"https://ror.org/04kd6c783"},{"id":"https://openalex.org/F4320313329","display_name":"Game and Wildlife Conservation Trust","ror":"https://ror.org/015eybs17"},{"id":"https://openalex.org/F4320313710","display_name":"Menzies School of Health Research","ror":"https://ror.org/006mbby82"},{"id":"https://openalex.org/F4320314455","display_name":"Minist\u00e8re de l'\u00c9conomie, de la Science et de l'Innovation - Qu\u00e9bec","ror":null},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":60,"referenced_works":["https://openalex.org/W1972090741","https://openalex.org/W1979527452","https://openalex.org/W1985291160","https://openalex.org/W1997576530","https://openalex.org/W2004937484","https://openalex.org/W2022740893","https://openalex.org/W2024122052","https://openalex.org/W2028918287","https://openalex.org/W2029601347","https://openalex.org/W2033263591","https://openalex.org/W2059226577","https://openalex.org/W2066691060","https://openalex.org/W2068334544","https://openalex.org/W2076264849","https://openalex.org/W2080592089","https://openalex.org/W2083963764","https://openalex.org/W2088032806","https://openalex.org/W2090213052","https://openalex.org/W2091085450","https://openalex.org/W2100192144","https://openalex.org/W2100720297","https://openalex.org/W2104196799","https://openalex.org/W2109473404","https://openalex.org/W2110195531","https://openalex.org/W2114995630","https://openalex.org/W2117689653","https://openalex.org/W2128294826","https://openalex.org/W2133712009","https://openalex.org/W2137196255","https://openalex.org/W2137296754","https://openalex.org/W2138383740","https://openalex.org/W2146296339","https://openalex.org/W2147657366","https://openalex.org/W2148645468","https://openalex.org/W2151460056","https://openalex.org/W2152390090","https://openalex.org/W2152885346","https://openalex.org/W2154346069","https://openalex.org/W2155063683","https://openalex.org/W2155852554","https://openalex.org/W2157103506","https://openalex.org/W2157225945","https://openalex.org/W2164264749","https://openalex.org/W2166151045","https://openalex.org/W2168682824","https://openalex.org/W2170293694","https://openalex.org/W2176864362","https://openalex.org/W2500686521","https://openalex.org/W2739649174","https://openalex.org/W3113306529","https://openalex.org/W3148387930","https://openalex.org/W4229517165","https://openalex.org/W4231723008","https://openalex.org/W4236302577","https://openalex.org/W4239302855","https://openalex.org/W4250753400","https://openalex.org/W6643353845","https://openalex.org/W6665446362","https://openalex.org/W6673310382","https://openalex.org/W6677381316"],"related_works":["https://openalex.org/W2290195868","https://openalex.org/W2031173571","https://openalex.org/W4285204597","https://openalex.org/W1555453305","https://openalex.org/W3193874149","https://openalex.org/W2987765027","https://openalex.org/W2379215066","https://openalex.org/W2047210963","https://openalex.org/W2057019356","https://openalex.org/W2063202236"],"abstract_inverted_index":{"While":[0],"scalable":[1],"coherence":[2,30,65,72,93,99,112],"has":[3],"been":[4],"extensively":[5],"studied":[6],"in":[7,63,85,167],"the":[8,41,45,58,151,163,168,185],"context":[9],"of":[10,22,44,60,104,121,153,195],"general":[11],"purpose":[12],"chip":[13],"multiprocessors":[14],"(CMPs),":[15],"GPU":[16,35,46,92,154,183],"architectures":[17],"present":[18,118],"a":[19,70,90,178,182],"new":[20],"set":[21],"challenges.":[23],"Introducing":[24],"conventional":[25],"directory":[26],"protocols":[27,39,176],"adds":[28],"unnecessary":[29,193],"traffic":[31,113,190],"overhead":[32],"to":[33,88,107,137,192],"existing":[34],"applications.":[36],"Moreover,":[37],"these":[38],"increase":[40],"verification":[42],"complexity":[43],"memory":[47],"system.":[48],"Recent":[49],"research,":[50],"Library":[51],"Cache":[52],"Coherence":[53,78],"(LCC)":[54],"[34,":[55],"54],":[56],"explored":[57],"use":[59],"time-based":[61,71],"approaches":[62],"CMP":[64],"protocols.":[66],"This":[67],"paper":[68],"describes":[69],"framework":[73],"for":[74],"GPUs,":[75],"called":[76,123],"Temporal":[77],"(TC),":[79],"that":[80,174],"exploits":[81],"globally":[82],"synchronized":[83],"counters":[84,96],"single-chip":[86],"systems":[87],"develop":[89],"streamlined":[91],"protocol.":[94],"Synchronized":[95],"enable":[97],"all":[98,111],"transitions,":[100],"such":[101],"as":[102,184],"invalidation":[103],"cache":[105],"blocks,":[106],"happen":[108],"synchronously,":[109],"eliminating":[110],"and":[114,132,140],"protocol":[115,180],"races.":[116],"We":[117,171],"an":[119],"implementation":[120],"TC,":[122],"TC-Weak,":[124],"which":[125],"eliminates":[126],"LCC's":[127],"trade-off":[128],"between":[129],"stalling":[130],"stores":[131],"increasing":[133],"L1":[134,147,165],"miss":[135],"rates":[136],"improve":[138],"performance":[139,152],"reduce":[141],"interconnect":[142],"traffic.":[143],"By":[144],"providing":[145],"coherent":[146],"caches,":[148],"TC-Weak":[149],"improves":[150],"applications":[155],"with":[156],"inter-workgroup":[157],"communication":[158],"by":[159],"85%":[160],"over":[161],"disabling":[162],"non-coherent":[164],"caches":[166],"baseline":[169],"GPU.":[170],"also":[172],"find":[173],"write-through":[175],"outperform":[177],"writeback":[179],"on":[181],"latter":[186],"suffers":[187],"from":[188],"increased":[189],"due":[191],"refills":[194],"write-once":[196],"data.":[197]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":11},{"year":2021,"cited_by_count":10},{"year":2020,"cited_by_count":12},{"year":2019,"cited_by_count":12},{"year":2018,"cited_by_count":14},{"year":2017,"cited_by_count":21},{"year":2016,"cited_by_count":17},{"year":2015,"cited_by_count":24},{"year":2014,"cited_by_count":12},{"year":2013,"cited_by_count":15}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}