{"id":"https://openalex.org/W2011784341","doi":"https://doi.org/10.1109/hpca.2013.6522340","title":"ESESC: A fast multicore simulator using Time-Based Sampling","display_name":"ESESC: A fast multicore simulator using Time-Based Sampling","publication_year":2013,"publication_date":"2013-02-01","ids":{"openalex":"https://openalex.org/W2011784341","doi":"https://doi.org/10.1109/hpca.2013.6522340","mag":"2011784341"},"language":"en","primary_location":{"id":"doi:10.1109/hpca.2013.6522340","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2013.6522340","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112622151","display_name":"Ehsan K. Ardestani","orcid":null},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E. K. Ardestani","raw_affiliation_strings":["Department of Computer Engineering, University of California Santa Cruz, USA","Department of Computer Engineering, University of California Santa Cruz, Santa Cruz, CA, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]},{"raw_affiliation_string":"Department of Computer Engineering, University of California Santa Cruz, Santa Cruz, CA, USA#TAB#","institution_ids":["https://openalex.org/I185103710"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065936105","display_name":"Jose Renau","orcid":"https://orcid.org/0000-0001-5128-0506"},"institutions":[{"id":"https://openalex.org/I185103710","display_name":"University of California, Santa Cruz","ror":"https://ror.org/03s65by71","country_code":"US","type":"education","lineage":["https://openalex.org/I185103710"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J. Renau","raw_affiliation_strings":["Department of Computer Engineering, University of California Santa Cruz, USA","Department of Computer Engineering, University of California Santa Cruz, Santa Cruz, CA, USA#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, University of California Santa Cruz, USA","institution_ids":["https://openalex.org/I185103710"]},{"raw_affiliation_string":"Department of Computer Engineering, University of California Santa Cruz, Santa Cruz, CA, USA#TAB#","institution_ids":["https://openalex.org/I185103710"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":17.7612,"has_fulltext":false,"cited_by_count":127,"citation_normalized_percentile":{"value":0.9951774,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":95,"max":100},"biblio":{"volume":null,"issue":null,"first_page":"448","last_page":"459"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7754210233688354},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.6966222524642944},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.6603817939758301},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.5541481375694275},{"id":"https://openalex.org/keywords/homogeneity","display_name":"Homogeneity (statistics)","score":0.5080287456512451},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.45425912737846375},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.45296740531921387},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.42691415548324585},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.41144663095474243},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2463383674621582},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07353156805038452}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7754210233688354},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.6966222524642944},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.6603817939758301},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.5541481375694275},{"id":"https://openalex.org/C142259097","wikidata":"https://www.wikidata.org/wiki/Q5891314","display_name":"Homogeneity (statistics)","level":2,"score":0.5080287456512451},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.45425912737846375},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.45296740531921387},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.42691415548324585},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.41144663095474243},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2463383674621582},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07353156805038452},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/hpca.2013.6522340","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2013.6522340","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 19th International Symposium on High Performance Computer Architecture (HPCA)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.363.5981","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.363.5981","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://masc.soe.ucsc.edu/docs/hpca13.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1522250664","https://openalex.org/W1966708898","https://openalex.org/W2001408484","https://openalex.org/W2033797066","https://openalex.org/W2034062945","https://openalex.org/W2036853599","https://openalex.org/W2096864363","https://openalex.org/W2105249097","https://openalex.org/W2106370201","https://openalex.org/W2119370555","https://openalex.org/W2129548165","https://openalex.org/W2133458680","https://openalex.org/W2133521202","https://openalex.org/W2136281672","https://openalex.org/W2138146350","https://openalex.org/W2138708064","https://openalex.org/W2141386638","https://openalex.org/W2145021036","https://openalex.org/W2153456949","https://openalex.org/W2155764480","https://openalex.org/W2158924248","https://openalex.org/W2160401437","https://openalex.org/W2161522487","https://openalex.org/W2165138143","https://openalex.org/W2169875292","https://openalex.org/W2170382128","https://openalex.org/W2338817833","https://openalex.org/W4235067174","https://openalex.org/W4237941914","https://openalex.org/W4238549726","https://openalex.org/W4238816702","https://openalex.org/W4246439759","https://openalex.org/W6631155369"],"related_works":["https://openalex.org/W1999392235","https://openalex.org/W2059493168","https://openalex.org/W2075537321","https://openalex.org/W2055668825","https://openalex.org/W2371593620","https://openalex.org/W2156037511","https://openalex.org/W2572678357","https://openalex.org/W2019481703","https://openalex.org/W2024930283","https://openalex.org/W1568996612"],"abstract_inverted_index":{"Architects":[0],"rely":[1],"on":[2,131,140],"simulation":[3,13,51,73,122],"in":[4,72,81,119],"their":[5,16,23],"exploration":[6],"of":[7,22,52,74,83,90,95,123,149,155],"the":[8,20,67,96,104,110],"design":[9],"space.":[10],"However,":[11],"slow":[12],"speed":[14],"caps":[15],"productivity":[17],"and":[18,116,128],"limits":[19],"depth":[21],"exploration.":[24],"Sampling":[25,61],"has":[26,47],"been":[27,48],"a":[28,63,146,152],"commonly":[29],"used":[30],"remedy.":[31],"While":[32],"sampling":[33,71],"is":[34,66,109],"shown":[35],"to":[36,50,69,112],"be":[37],"an":[38,136],"effective":[39],"technique":[40],"for":[41,151],"single":[42],"core":[43],"processors,":[44],"its":[45],"application":[46,84],"limited":[49],"multi-program,":[53],"throughput":[54],"applications":[55],"only.":[56],"This":[57],"work":[58],"presents":[59],"Time-Based":[60],"(TBS),":[62],"framework":[64],"that":[65,144],"first":[68,111],"enable":[70,113],"multicore":[75,124],"processors":[76],"with":[77],"virtually":[78],"no":[79],"limitation":[80],"terms":[82],"type":[85],"(multi-programmed":[86],"or":[87,93],"multithreaded),":[88],"number":[89],"cores,":[91],"homogeneity":[92],"heterogeneity":[94],"simulated":[97],"configuration":[98],"(4.99%":[99],"error":[100,130],"averaged":[101],"across":[102],"all":[103],"evaluated":[105],"configurations).":[106],"TBS":[107],"also":[108],"integrated":[114],"power":[115],"temperature":[117],"evaluation":[118,154],"statistically":[120],"sampled":[121],"systems":[125],"(with":[126],"5.5%":[127],"2.4%":[129],"average,":[132],"respectively).":[133],"We":[134],"implement":[135],"architectural":[137],"simulator":[138],"based":[139],"TBS,":[141],"called":[142],"ESESC,":[143],"provides":[145],"holistic":[147],"set":[148],"tools":[150],"fair":[153],"different":[156],"architectures.":[157]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":9},{"year":2019,"cited_by_count":9},{"year":2018,"cited_by_count":18},{"year":2017,"cited_by_count":14},{"year":2016,"cited_by_count":17},{"year":2015,"cited_by_count":20},{"year":2014,"cited_by_count":13},{"year":2013,"cited_by_count":6}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
