{"id":"https://openalex.org/W2097767932","doi":"https://doi.org/10.1109/hpca.2009.4798271","title":"Characterization of Direct Cache Access on multi-core systems and 10GbE","display_name":"Characterization of Direct Cache Access on multi-core systems and 10GbE","publication_year":2009,"publication_date":"2009-02-01","ids":{"openalex":"https://openalex.org/W2097767932","doi":"https://doi.org/10.1109/hpca.2009.4798271","mag":"2097767932"},"language":"en","primary_location":{"id":"doi:10.1109/hpca.2009.4798271","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2009.4798271","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE 15th International Symposium on High Performance Computer Architecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005075350","display_name":"Amit Kumar","orcid":"https://orcid.org/0000-0002-1871-8315"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN","US"],"is_corresponding":true,"raw_author_name":"Amit Kumar","raw_affiliation_strings":["Intel Corporation, India","Intel Corp., USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Intel Corp., USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5091152532","display_name":"Ram Huggahalli","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN","US"],"is_corresponding":false,"raw_author_name":"Ram Huggahalli","raw_affiliation_strings":["Intel Corporation, India","Intel Corp., USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Intel Corp., USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010737897","display_name":"Srihari Makineni","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210146682","display_name":"Intel (India)","ror":"https://ror.org/04f2n1245","country_code":"IN","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"]}],"countries":["IN","US"],"is_corresponding":false,"raw_author_name":"Srihari Makineni","raw_affiliation_strings":["Intel Corporation, India","Intel Corp., USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, India","institution_ids":["https://openalex.org/I4210146682"]},{"raw_affiliation_string":"Intel Corp., USA#TAB#","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5005075350"],"corresponding_institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I4210146682"],"apc_list":null,"apc_paid":null,"fwci":5.4856,"has_fulltext":false,"cited_by_count":31,"citation_normalized_percentile":{"value":0.96089491,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"341","last_page":"352"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7992116212844849},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7862696647644043},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.5165582895278931},{"id":"https://openalex.org/keywords/focus","display_name":"Focus (optics)","score":0.49406054615974426},{"id":"https://openalex.org/keywords/feature","display_name":"Feature (linguistics)","score":0.47405120730400085},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.44401121139526367},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.44163209199905396},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.43707627058029175},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.434524804353714},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.41698676347732544},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3950279653072357},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.3606308698654175},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.3301604688167572}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7992116212844849},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7862696647644043},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.5165582895278931},{"id":"https://openalex.org/C192209626","wikidata":"https://www.wikidata.org/wiki/Q190909","display_name":"Focus (optics)","level":2,"score":0.49406054615974426},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.47405120730400085},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.44401121139526367},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.44163209199905396},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.43707627058029175},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.434524804353714},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.41698676347732544},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3950279653072357},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.3606308698654175},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.3301604688167572},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hpca.2009.4798271","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2009.4798271","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE 15th International Symposium on High Performance Computer Architecture","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1499559258","https://openalex.org/W1530928880","https://openalex.org/W1999955156","https://openalex.org/W2087714940","https://openalex.org/W2110241978","https://openalex.org/W2120436909","https://openalex.org/W2137755180","https://openalex.org/W2138057209","https://openalex.org/W2150452703","https://openalex.org/W2160094191","https://openalex.org/W2164144057","https://openalex.org/W2168855639","https://openalex.org/W3147196396","https://openalex.org/W4213240951","https://openalex.org/W4244923394","https://openalex.org/W6630026792","https://openalex.org/W6631538874"],"related_works":["https://openalex.org/W2326041751","https://openalex.org/W2114386333","https://openalex.org/W2363769136","https://openalex.org/W2031173804","https://openalex.org/W2734782074","https://openalex.org/W2012518269","https://openalex.org/W2109715593","https://openalex.org/W2146079099","https://openalex.org/W4213009904","https://openalex.org/W4234542536"],"abstract_inverted_index":{"10":[0],"GbE":[1],"connectivity":[2],"is":[3,31,126],"expected":[4],"to":[5,24,36,40,50,120,147],"be":[6,51,55,95],"a":[7,66,124,136],"standard":[8,137],"feature":[9,46],"of":[10,28,63],"server":[11],"platforms":[12,30],"in":[13,65],"the":[14,18,83,89,104,108],"near":[15],"future.":[16],"Among":[17],"numerous":[19],"methods":[20],"and":[21,68,117,131],"features":[22],"proposed":[23],"improve":[25],"network":[26,98,139],"performance":[27,90],"such":[29],"direct":[32],"cache":[33,125],"access":[34],"(DCA)":[35],"route":[37],"incoming":[38],"I/O":[39,105,150],"CPU":[41],"caches":[42],"directly.":[43],"While":[44],"this":[45,72],"has":[47],"been":[48],"shown":[49],"promising,":[52],"there":[53],"can":[54,94],"significant":[56],"challenges":[57],"when":[58,97],"dealing":[59],"with":[60,80],"high":[61],"rates":[62],"traffic":[64,99],"multiprocessor":[67],"multi-core":[69],"environment.":[70],"In":[71,82,107],"paper,":[73],"we":[74,86,111,133],"focus":[75],"on":[76],"two":[77],"practical":[78],"considerations":[79],"DCA.":[81],"first":[84],"case,":[85,110],"show":[87,112,134],"that":[88,113,122,135],"benefit":[91],"from":[92],"DCA":[93],"limited":[96],"processing":[100],"rate":[101],"cannot":[102],"match":[103],"rate.":[106],"second":[109],"affinitizing":[114],"both":[115],"stack":[116,140],"application":[118],"contexts":[119],"cores":[121],"share":[123],"critical.":[127],"With":[128],"proper":[129],"distribution":[130],"affinity,":[132],"Linux":[138],"runs":[141],"32%":[142],"faster":[143],"for":[144],"2":[145],"KB":[146,149],"64":[148],"sizes.":[151]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":8}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}