{"id":"https://openalex.org/W2115676933","doi":"https://doi.org/10.1109/hpca.2009.4798270","title":"A first-order fine-grained multithreaded throughput model","display_name":"A first-order fine-grained multithreaded throughput model","publication_year":2009,"publication_date":"2009-02-01","ids":{"openalex":"https://openalex.org/W2115676933","doi":"https://doi.org/10.1109/hpca.2009.4798270","mag":"2115676933"},"language":"en","primary_location":{"id":"doi:10.1109/hpca.2009.4798270","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2009.4798270","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE 15th International Symposium on High Performance Computer Architecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067477853","display_name":"Xuehua Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"X.E. Chen","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","Dept of Electrical & Computer Engineering, University of British Columbia, Vancouver, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"Dept of Electrical & Computer Engineering, University of British Columbia, Vancouver, Canada","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5026788167","display_name":"Tor M. Aamodt","orcid":"https://orcid.org/0000-0003-1161-692X"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"T.M. Aamodt","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","Dept of Electrical & Computer Engineering, University of British Columbia, Vancouver, Canada"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"Dept of Electrical & Computer Engineering, University of British Columbia, Vancouver, Canada","institution_ids":["https://openalex.org/I141945490"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I141945490"],"apc_list":null,"apc_paid":null,"fwci":9.3846,"has_fulltext":false,"cited_by_count":86,"citation_normalized_percentile":{"value":0.9825906,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"329","last_page":"340"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.890693724155426},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.814680814743042},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7287081480026245},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.6309505701065063},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6268101930618286},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.6233268976211548},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.6019350290298462},{"id":"https://openalex.org/keywords/markov-chain","display_name":"Markov chain","score":0.5159943103790283},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5011200904846191},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.44953280687332153},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.4480382800102234},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.44749850034713745},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.11474430561065674}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.890693724155426},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.814680814743042},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7287081480026245},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.6309505701065063},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6268101930618286},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.6233268976211548},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.6019350290298462},{"id":"https://openalex.org/C98763669","wikidata":"https://www.wikidata.org/wiki/Q176645","display_name":"Markov chain","level":2,"score":0.5159943103790283},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5011200904846191},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.44953280687332153},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.4480382800102234},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.44749850034713745},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.11474430561065674},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/hpca.2009.4798270","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2009.4798270","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE 15th International Symposium on High Performance Computer Architecture","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.564.3582","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.564.3582","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.ubc.ca/~aamodt/papers/xichen.hpca2009.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5400000214576721}],"awards":[],"funders":[{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W1555915743","https://openalex.org/W1946902536","https://openalex.org/W1991626794","https://openalex.org/W2018352428","https://openalex.org/W2022740893","https://openalex.org/W2035843421","https://openalex.org/W2041562692","https://openalex.org/W2056026474","https://openalex.org/W2059593728","https://openalex.org/W2066339098","https://openalex.org/W2073617099","https://openalex.org/W2092768095","https://openalex.org/W2094877030","https://openalex.org/W2120230074","https://openalex.org/W2127637835","https://openalex.org/W2139350452","https://openalex.org/W2144954274","https://openalex.org/W2149003795","https://openalex.org/W2153456949","https://openalex.org/W2155396321","https://openalex.org/W2157300467","https://openalex.org/W2163290010","https://openalex.org/W2163935347","https://openalex.org/W2197000251","https://openalex.org/W2462402886","https://openalex.org/W2487845934","https://openalex.org/W2725179571","https://openalex.org/W3137094666","https://openalex.org/W3142147837","https://openalex.org/W4210602670","https://openalex.org/W4243970730","https://openalex.org/W4251534053","https://openalex.org/W4253317936","https://openalex.org/W4301906759"],"related_works":["https://openalex.org/W2350993697","https://openalex.org/W2363769136","https://openalex.org/W2046128376","https://openalex.org/W2109715593","https://openalex.org/W2086718556","https://openalex.org/W1863436361","https://openalex.org/W1860107648","https://openalex.org/W57688818","https://openalex.org/W1965891727","https://openalex.org/W2088918039"],"abstract_inverted_index":{"Analytical":[0],"modeling":[1,121],"is":[2],"an":[3,148],"alternative":[4],"to":[5,12,49,59,161],"detailed":[6,179],"performance":[7,145],"simulation":[8],"with":[9,70,147],"the":[10,14,28,52,86,97,103,111,122,125,156,165,175],"potential":[11],"shorten":[13],"development":[15],"cycle":[16],"and":[17,31,105,113,129,195],"provide":[18],"additional":[19],"insights.":[20],"This":[21],"paper":[22,186],"proposes":[23,44],"analytical":[24,72],"models":[25,136,190],"for":[26,62,83,172],"predicting":[27],"cache":[29,56,60,73,133,193],"contention":[30,61,74,134,194],"throughput":[32,87,140,196],"of":[33,54,66,88,99,115,124,132,151,158,167],"heavily":[34],"multithreaded":[35,91,169],"architectures":[36],"such":[37],"as":[38,102,178],"Sun":[39,204],"Microsystems'":[40],"Niagara.":[41],"First,":[42],"it":[43,77],"a":[45,79,118,143,162],"novel":[46],"probabilistic":[47],"model":[48,82,95,160],"accurately":[50,137,191],"predict":[51,138,192],"number":[53,98],"extra":[55],"misses":[57],"due":[58],"significantly":[63],"larger":[64],"numbers":[65],"threads":[67,101,128],"than":[68],"possible":[69],"prior":[71],"models.":[75],"Then":[76],"presents":[78],"Markov":[80,94],"chain":[81],"analytically":[84],"estimating":[85],"multicore,":[89],"fine-grained":[90,168],"architectures.":[92],"The":[93],"uses":[96],"stalled":[100],"states":[104],"calculates":[106],"transition":[107],"probabilities":[108],"based":[109],"upon":[110],"rates":[112],"latencies":[114],"events":[116],"stalling":[117],"thread.":[119],"By":[120],"overlapping":[123],"stalls":[126],"among":[127],"taking":[130],"account":[131],"our":[135,159,189],"system":[139],"obtained":[141],"from":[142],"cycle-accurate":[144],"simulator":[146],"average":[149],"error":[150],"7.9%.":[152],"We":[153],"also":[154],"demonstrate":[155],"application":[157],"design":[163,166],"problem-optimizing":[164],"chip":[170],"multiprocessors":[171],"application-specific":[173],"workloads-yielding":[174],"same":[176],"result":[177],"simulations":[180],"65":[181],"times":[182],"faster.":[183],"Moreover,":[184],"this":[185],"shows":[187],"that":[188],"trends":[197],"across":[198],"varying":[199],"workloads":[200],"on":[201],"real":[202],"hardware-a":[203],"Fire":[205],"T1000":[206],"server.":[207]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":8},{"year":2014,"cited_by_count":12},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":9}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
