{"id":"https://openalex.org/W2171134934","doi":"https://doi.org/10.1109/hpca.2009.4798237","title":"Design and implementation of software-managed caches for multicores with local memory","display_name":"Design and implementation of software-managed caches for multicores with local memory","publication_year":2009,"publication_date":"2009-02-01","ids":{"openalex":"https://openalex.org/W2171134934","doi":"https://doi.org/10.1109/hpca.2009.4798237","mag":"2171134934"},"language":"en","primary_location":{"id":"doi:10.1109/hpca.2009.4798237","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2009.4798237","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE 15th International Symposium on High Performance Computer Architecture","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5114677150","display_name":"Sangmin Seo","orcid":"https://orcid.org/0000-0002-9515-9836"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Sangmin Seo","raw_affiliation_strings":["School of Computer Science and Engineering, Seoul National University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science and Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100767182","display_name":"Jaejin Lee","orcid":"https://orcid.org/0000-0003-4638-8170"},"institutions":[{"id":"https://openalex.org/I139264467","display_name":"Seoul National University","ror":"https://ror.org/04h9pn542","country_code":"KR","type":"education","lineage":["https://openalex.org/I139264467"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Jaejin Lee","raw_affiliation_strings":["School of Computer Science and Engineering, Seoul National University, Seoul, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science and Engineering, Seoul National University, Seoul, South Korea","institution_ids":["https://openalex.org/I139264467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072951628","display_name":"Zehra Sura","orcid":null},"institutions":[{"id":"https://openalex.org/I4210114115","display_name":"IBM Research - Thomas J. Watson Research Center","ror":"https://ror.org/0265w5591","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zehra Sura","raw_affiliation_strings":["IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Thomas J. Watson Research Center, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I4210114115"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":6.9702,"has_fulltext":false,"cited_by_count":42,"citation_normalized_percentile":{"value":0.97464042,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"55","last_page":"66"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10101","display_name":"Cloud Computing and Resource Management","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.903227686882019},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6320970058441162},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5941592454910278},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.5188018679618835},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4961448609828949},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.49287891387939453},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.47828397154808044},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.43766483664512634},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.41985979676246643},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3582500219345093},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3270362615585327}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.903227686882019},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6320970058441162},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5941592454910278},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.5188018679618835},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4961448609828949},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.49287891387939453},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.47828397154808044},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.43766483664512634},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.41985979676246643},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3582500219345093},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3270362615585327}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/hpca.2009.4798237","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hpca.2009.4798237","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 IEEE 15th International Symposium on High Performance Computer Architecture","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.149.6307","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.149.6307","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.cs.utah.edu/arch-rd-web/SMC_paper.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/17","score":0.4399999976158142,"display_name":"Partnerships for the goals"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W127009360","https://openalex.org/W1500117749","https://openalex.org/W1555915743","https://openalex.org/W1605419350","https://openalex.org/W2000755544","https://openalex.org/W2051598123","https://openalex.org/W2080393180","https://openalex.org/W2080958936","https://openalex.org/W2090283364","https://openalex.org/W2090994050","https://openalex.org/W2095689589","https://openalex.org/W2105504416","https://openalex.org/W2108117840","https://openalex.org/W2122978030","https://openalex.org/W2131926352","https://openalex.org/W2132258839","https://openalex.org/W2135518093","https://openalex.org/W2140130374","https://openalex.org/W2143285027","https://openalex.org/W2152609355","https://openalex.org/W2153492376","https://openalex.org/W2160062854","https://openalex.org/W2170284496","https://openalex.org/W2547815835","https://openalex.org/W2751601659","https://openalex.org/W3152703111","https://openalex.org/W4235218387","https://openalex.org/W4247641071","https://openalex.org/W6636278794","https://openalex.org/W6675903345","https://openalex.org/W6683785228"],"related_works":["https://openalex.org/W2535115842","https://openalex.org/W2020176098","https://openalex.org/W2133489088","https://openalex.org/W2114386333","https://openalex.org/W2118932116","https://openalex.org/W2363769136","https://openalex.org/W2734782074","https://openalex.org/W2116323004","https://openalex.org/W2098406302","https://openalex.org/W2217292995"],"abstract_inverted_index":{"Heterogeneous":[0],"multicores,":[1],"such":[2,54],"as":[3],"Cell":[4,208],"BE":[5,209],"processors":[6],"and":[7,23,33,50,70,80,131,145,164,182,202,211,258],"GPGPUs,":[8],"typically":[9],"do":[10],"not":[11],"have":[12,42],"caches":[13],"for":[14,162,185],"their":[15,48,166,213],"accelerator":[16,40],"cores":[17,41,252],"because":[18],"coherence":[19],"traffic,":[20],"cache":[21,86,117,122,144,179],"misses,":[22],"latencies":[24],"from":[25],"different":[26],"types":[27],"of":[28,53,67,106,128,195],"memory":[29,45,66,260],"accesses":[30],"add":[31],"overhead":[32],"adversely":[34],"affect":[35],"instruction":[36],"scheduling.":[37],"Instead,":[38],"the":[39,64,71,104,107,126,142,152,177,193,200,207,224,242],"internal":[43],"local":[44,65,90,257],"to":[46,95,141,151,250,255],"place":[47],"code":[49],"data.":[51],"Programmers":[52],"heterogeneous":[55],"multicore":[56,263],"architectures":[57],"must":[58],"explicitly":[59],"manage":[60],"data":[61,98],"transfers":[62,99],"between":[63],"a":[68,78,114,262],"core":[69],"globally":[72],"shared":[73],"main":[74],"memory.":[75],"This":[76],"is":[77,139,149,248],"tedious":[79],"errorprone":[81],"programming":[82],"task.":[83],"A":[84],"software-managed":[85,116],"(SMC),":[87],"implemented":[88],"in":[89,261],"memory,":[91],"can":[92],"be":[93],"programmed":[94],"automatically":[96],"handle":[97],"at":[100,189],"runtime,":[101],"thus":[102],"simplifying":[103],"task":[105],"programmer.":[108],"In":[109,168,244],"this":[110],"paper,":[111],"we":[112,170,198],"propose":[113,171],"new":[115],"design,":[118],"called":[119],"extended":[120],"set-index":[121],"(ESC).":[123],"It":[124],"has":[125],"benefits":[127],"both":[129,256],"set-associative":[130,143],"fully":[132,153],"associative":[133,154],"caches.":[134],"Its":[135],"tag":[136],"search":[137],"speed":[138],"comparable":[140,150],"its":[146],"miss":[147],"rate":[148],"cache.":[155],"We":[156],"examine":[157],"various":[158],"line":[159,180],"replacement":[160,183],"policies":[161],"SMCs,":[163],"discuss":[165],"trade-offs.":[167],"addition,":[169],"adaptive":[172,236],"execution":[173,237],"strategies":[174,238],"that":[175,223,234],"select":[176],"optimal":[178],"size":[181],"policy":[184],"each":[186],"program":[187],"region":[188],"runtime.":[190],"To":[191],"evaluate":[192],"effectiveness":[194],"our":[196,235,246],"approach,":[197],"implement":[199],"ESC":[201,225],"other":[203,227],"SMC":[204,228],"designs":[205],"on":[206],"architecture,":[210],"measure":[212],"performance":[214],"with":[215,241,253],"8":[216],"OpenMP":[217],"applications.":[218],"The":[219,230],"evaluation":[220],"results":[221,231],"show":[222,233],"outperforms":[226],"designs.":[229],"also":[232],"work":[239],"well":[240],"ESC.":[243],"fact,":[245],"approach":[247],"applicable":[249],"all":[251],"access":[254],"global":[259],"architecture.":[264]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":10}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}