{"id":"https://openalex.org/W2621307772","doi":"https://doi.org/10.1109/hotchips.2016.7936233","title":"Experiences using a novel Python-based hardware modeling framework for computer architecture test chips","display_name":"Experiences using a novel Python-based hardware modeling framework for computer architecture test chips","publication_year":2016,"publication_date":"2016-08-01","ids":{"openalex":"https://openalex.org/W2621307772","doi":"https://doi.org/10.1109/hotchips.2016.7936233","mag":"2621307772"},"language":"en","primary_location":{"id":"doi:10.1109/hotchips.2016.7936233","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hotchips.2016.7936233","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE Hot Chips 28 Symposium (HCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5026966440","display_name":"Christopher Torng","orcid":"https://orcid.org/0000-0002-2385-619X"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Christopher Torng","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046661425","display_name":"Moyang Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Moyang Wang","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014559371","display_name":"Bharath Sudheendra","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bharath Sudheendra","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112283579","display_name":"Nagaraj Murali","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nagaraj Murali","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043608888","display_name":"Suren Jayasuriya","orcid":"https://orcid.org/0000-0001-7143-4429"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Suren Jayasuriya","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078586017","display_name":"S Srinath","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shreesha Srinath","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082737827","display_name":"T E Pritchard","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Taylor Pritchard","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018292288","display_name":"Robin Ying","orcid":"https://orcid.org/0000-0001-5115-9407"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Robin Ying","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091660287","display_name":"Christopher Batten","orcid":"https://orcid.org/0000-0002-2835-667X"},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Christopher Batten","raw_affiliation_strings":["School of Electrical and Computer Engineering, Cornell University, Ithaca, NY"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Cornell University, Ithaca, NY","institution_ids":["https://openalex.org/I205783295"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":["https://openalex.org/A5026966440"],"corresponding_institution_ids":["https://openalex.org/I205783295"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.22023698,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"1"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.988099992275238,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/python","display_name":"Python (programming language)","score":0.8904790282249451},{"id":"https://openalex.org/keywords/agile-software-development","display_name":"Agile software development","score":0.7206951379776001},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7205689549446106},{"id":"https://openalex.org/keywords/ibm","display_name":"IBM","score":0.7017693519592285},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6283751130104065},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.4899272322654724},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4551011621952057},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37373095750808716},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.309235155582428},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.28567585349082947}],"concepts":[{"id":"https://openalex.org/C519991488","wikidata":"https://www.wikidata.org/wiki/Q28865","display_name":"Python (programming language)","level":2,"score":0.8904790282249451},{"id":"https://openalex.org/C14185376","wikidata":"https://www.wikidata.org/wiki/Q30232","display_name":"Agile software development","level":2,"score":0.7206951379776001},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7205689549446106},{"id":"https://openalex.org/C70388272","wikidata":"https://www.wikidata.org/wiki/Q5968558","display_name":"IBM","level":2,"score":0.7017693519592285},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6283751130104065},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.4899272322654724},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4551011621952057},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37373095750808716},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.309235155582428},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.28567585349082947},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hotchips.2016.7936233","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hotchips.2016.7936233","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE Hot Chips 28 Symposium (HCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2079751107"],"related_works":["https://openalex.org/W3126131865","https://openalex.org/W4253186488","https://openalex.org/W2341492732","https://openalex.org/W2044344400","https://openalex.org/W3187193180","https://openalex.org/W1996938127","https://openalex.org/W2083611981","https://openalex.org/W106542691","https://openalex.org/W4287027380","https://openalex.org/W2072507639"],"abstract_inverted_index":{"This":[0],"poster":[1],"will":[2],"describe":[3],"a":[4],"taped-out":[5],"2\u00d72mm":[6],"1.3":[7],"M-transistor":[8],"test":[9],"chip":[10],"in":[11],"IBM":[12],"130":[13],"nm":[14],"designed":[15],"using":[16],"our":[17,26],"new":[18],"Python-based":[19],"hardware":[20,39],"modeling":[21],"framework.":[22],"The":[23],"goal":[24],"of":[25,33],"tapeout":[27],"was":[28],"to":[29,36],"demonstrate":[30],"the":[31],"ability":[32],"this":[34],"framework":[35],"enable":[37],"Agile":[38],"design":[40],"flows.":[41]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
