{"id":"https://openalex.org/W2620877545","doi":"https://doi.org/10.1109/hotchips.2016.7936218","title":"KiloCore: A 32 nm 1000-processor array","display_name":"KiloCore: A 32 nm 1000-processor array","publication_year":2016,"publication_date":"2016-08-01","ids":{"openalex":"https://openalex.org/W2620877545","doi":"https://doi.org/10.1109/hotchips.2016.7936218","mag":"2620877545"},"language":"en","primary_location":{"id":"doi:10.1109/hotchips.2016.7936218","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hotchips.2016.7936218","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE Hot Chips 28 Symposium (HCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025162641","display_name":"Brent Bohnenstiehl","orcid":"https://orcid.org/0000-0002-5149-9388"},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Brent Bohnenstiehl","raw_affiliation_strings":["University of California, Davis, VLSI Computation Laboratory, United States of America"],"affiliations":[{"raw_affiliation_string":"University of California, Davis, VLSI Computation Laboratory, United States of America","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046279911","display_name":"Aaron Stillmaker","orcid":"https://orcid.org/0000-0002-7925-6177"},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Aaron Stillmaker","raw_affiliation_strings":["VLSI Computation Laboratory, University of California, Davis, USA"],"affiliations":[{"raw_affiliation_string":"VLSI Computation Laboratory, University of California, Davis, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033433243","display_name":"Jon J. Pimentel","orcid":"https://orcid.org/0000-0002-0833-0392"},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jon Pimentel","raw_affiliation_strings":["VLSI Computation Laboratory, University of California, Davis, USA"],"affiliations":[{"raw_affiliation_string":"VLSI Computation Laboratory, University of California, Davis, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078593150","display_name":"Timothy Andreas","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Timothy Andreas","raw_affiliation_strings":["UVLSI Computation Laboratory, University of California, Davis, USA"],"affiliations":[{"raw_affiliation_string":"UVLSI Computation Laboratory, University of California, Davis, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100395534","display_name":"Bin Liu","orcid":"https://orcid.org/0000-0002-8588-8744"},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bin Liu","raw_affiliation_strings":["VLSI Computation Laboratory, University of California, Davis, USA"],"affiliations":[{"raw_affiliation_string":"VLSI Computation Laboratory, University of California, Davis, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060594077","display_name":"Anh Tran","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anh Tran","raw_affiliation_strings":["VLSI Computation Laboratory, University of California, Davis, USA"],"affiliations":[{"raw_affiliation_string":"VLSI Computation Laboratory, University of California, Davis, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068290964","display_name":"Emmanuel Adeagbo","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Emmanuel Adeagbo","raw_affiliation_strings":["VLSI Computation Laboratory, University of California, Davis, USA"],"affiliations":[{"raw_affiliation_string":"VLSI Computation Laboratory, University of California, Davis, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058921665","display_name":"Bevan Baas","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bevan Baas","raw_affiliation_strings":["VLSI Computation Laboratory, University of California, Davis, USA"],"affiliations":[{"raw_affiliation_string":"VLSI Computation Laboratory, University of California, Davis, USA","institution_ids":["https://openalex.org/I84218800"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5025162641"],"corresponding_institution_ids":["https://openalex.org/I84218800"],"apc_list":null,"apc_paid":null,"fwci":1.1581,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.82884168,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"23"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7938515543937683},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7697408199310303},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5778366923332214},{"id":"https://openalex.org/keywords/network-processor","display_name":"Network processor","score":0.5370357036590576},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.5246757864952087},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.4735775887966156},{"id":"https://openalex.org/keywords/packet-switching","display_name":"Packet switching","score":0.43867695331573486},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3633955717086792},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34928321838378906},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3410627841949463}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7938515543937683},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7697408199310303},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5778366923332214},{"id":"https://openalex.org/C74366991","wikidata":"https://www.wikidata.org/wiki/Q2755335","display_name":"Network processor","level":3,"score":0.5370357036590576},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.5246757864952087},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.4735775887966156},{"id":"https://openalex.org/C113508815","wikidata":"https://www.wikidata.org/wiki/Q193446","display_name":"Packet switching","level":3,"score":0.43867695331573486},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3633955717086792},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34928321838378906},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3410627841949463}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hotchips.2016.7936218","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hotchips.2016.7936218","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE Hot Chips 28 Symposium (HCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7699999809265137}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2116677773","https://openalex.org/W2155261584","https://openalex.org/W2584231425","https://openalex.org/W2150611273","https://openalex.org/W2210470417","https://openalex.org/W2281138459","https://openalex.org/W601601246","https://openalex.org/W2076267709","https://openalex.org/W2151229702","https://openalex.org/W2496537239"],"abstract_inverted_index":{"Presents":[0],"a":[1],"collection":[2],"of":[3],"slides":[4],"covering":[5],"the":[6],"following":[7],"topics:":[8],"KiloCore;":[9],"globally":[10],"asynchronous-locally":[11],"synchronous":[12],"clocking;":[13],"dynamic":[14],"packet":[15],"routing":[16],"network;":[17],"and":[18],"processor":[19],"data":[20],"memory.":[21]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}