{"id":"https://openalex.org/W2472667575","doi":"https://doi.org/10.1109/hotchips.2012.7476493","title":"Floating point processing using FPGAs","display_name":"Floating point processing using FPGAs","publication_year":2012,"publication_date":"2012-08-01","ids":{"openalex":"https://openalex.org/W2472667575","doi":"https://doi.org/10.1109/hotchips.2012.7476493","mag":"2472667575"},"language":"en","primary_location":{"id":"doi:10.1109/hotchips.2012.7476493","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hotchips.2012.7476493","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Hot Chips 24 Symposium (HCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035604344","display_name":"Michael Parker","orcid":"https://orcid.org/0000-0001-7600-4356"},"institutions":[{"id":"https://openalex.org/I4210094575","display_name":"Altera (United Kingdom)","ror":"https://ror.org/00m96gg93","country_code":"GB","type":"company","lineage":["https://openalex.org/I4210094575"]},{"id":"https://openalex.org/I22433950","display_name":"Altera (United States)","ror":"https://ror.org/017b7j426","country_code":"US","type":"company","lineage":["https://openalex.org/I22433950"]}],"countries":["GB","US"],"is_corresponding":true,"raw_author_name":"Michael Parker","raw_affiliation_strings":["Altera Corp, United States","Altera Corp, San Jose, CA, US"],"affiliations":[{"raw_affiliation_string":"Altera Corp, United States","institution_ids":["https://openalex.org/I22433950","https://openalex.org/I4210094575"]},{"raw_affiliation_string":"Altera Corp, San Jose, CA, US","institution_ids":["https://openalex.org/I22433950"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5035604344"],"corresponding_institution_ids":["https://openalex.org/I22433950","https://openalex.org/I4210094575"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.28547688,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"31"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9787999987602234,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9787999987602234,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stratix","display_name":"Stratix","score":0.9466097354888916},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8882209062576294},{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.7749912738800049},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7626872062683105},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.6840459704399109},{"id":"https://openalex.org/keywords/benchmarking","display_name":"Benchmarking","score":0.6676371097564697},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.472698450088501},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.44515687227249146},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.42948824167251587},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4246538281440735},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.42444461584091187},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10604536533355713}],"concepts":[{"id":"https://openalex.org/C2776277307","wikidata":"https://www.wikidata.org/wiki/Q22074755","display_name":"Stratix","level":3,"score":0.9466097354888916},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8882209062576294},{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.7749912738800049},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7626872062683105},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.6840459704399109},{"id":"https://openalex.org/C86251818","wikidata":"https://www.wikidata.org/wiki/Q816754","display_name":"Benchmarking","level":2,"score":0.6676371097564697},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.472698450088501},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.44515687227249146},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.42948824167251587},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4246538281440735},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.42444461584091187},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10604536533355713},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hotchips.2012.7476493","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hotchips.2012.7476493","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Hot Chips 24 Symposium (HCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1509155667","https://openalex.org/W2518118925","https://openalex.org/W3208151864","https://openalex.org/W1564576805","https://openalex.org/W4254372399","https://openalex.org/W2560894929","https://openalex.org/W3028347934","https://openalex.org/W2472667575","https://openalex.org/W2081551722","https://openalex.org/W2106942255"],"abstract_inverted_index":{"This":[0],"article":[1],"consists":[2],"of":[3,6,28],"a":[4],"collection":[5],"slides":[7],"from":[8],"the":[9,29,34],"author's":[10],"conference":[11],"presentation":[12],"on":[13],"Altera's":[14],"Stratix":[15],"V,":[16],"floating":[17],"point":[18],"processing":[19],"using":[20],"field":[21],"programmable":[22],"gate":[23],"array":[24],"(FPGA)":[25],"technology.":[26],"Some":[27],"specific":[30],"topics":[31],"discussed":[32],"include:":[33],"Stratic":[35],"V":[36],"FPGA":[37],"architecture":[38],"and":[39,52,56,59],"system":[40],"specifications;":[41],"approaches":[42],"for":[43],"fused":[44],"data":[45],"path":[46],"processing;":[47],"throughout":[48],"capabilities":[49],"comparing":[50],"GFLOPS":[51],"GFLOPS/W;":[53],"computational":[54],"accurary":[55],"error":[57],"analysis;":[58],"third":[60],"party":[61],"benchmarking":[62],"techniques.":[63]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}