{"id":"https://openalex.org/W1980451599","doi":"https://doi.org/10.1109/hldvt.2010.5496662","title":"Quick formal modeling of communication fabrics to enable verification","display_name":"Quick formal modeling of communication fabrics to enable verification","publication_year":2010,"publication_date":"2010-06-01","ids":{"openalex":"https://openalex.org/W1980451599","doi":"https://doi.org/10.1109/hldvt.2010.5496662","mag":"1980451599"},"language":"en","primary_location":{"id":"doi:10.1109/hldvt.2010.5496662","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2010.5496662","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International High Level Design Validation and Test Workshop (HLDVT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102897547","display_name":"Satrajit Chatterjee","orcid":"https://orcid.org/0000-0001-8135-8378"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["GB","US"],"is_corresponding":true,"raw_author_name":"Satrajit Chatterjee","raw_affiliation_strings":["Intel Corporation, USA","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007256099","display_name":"Michael Kishinevsky","orcid":"https://orcid.org/0000-0002-5593-9694"},"institutions":[{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]},{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Michael Kishinevsky","raw_affiliation_strings":["Intel Corporation, USA","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084255924","display_name":"\u00dcmit Y. Ogras","orcid":"https://orcid.org/0000-0002-5045-5535"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210158342","display_name":"Intel (United Kingdom)","ror":"https://ror.org/058cxws58","country_code":"GB","type":"company","lineage":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"]}],"countries":["GB","US"],"is_corresponding":false,"raw_author_name":"Umit Y. Ogras","raw_affiliation_strings":["Intel Corporation, USA","Intel Corporation"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation","institution_ids":["https://openalex.org/I4210158342"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5102897547"],"corresponding_institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I4210158342"],"apc_list":null,"apc_paid":null,"fwci":5.7428,"has_fulltext":false,"cited_by_count":37,"citation_normalized_percentile":{"value":0.96492242,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"42","last_page":"49"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8632668256759644},{"id":"https://openalex.org/keywords/rotation-formalisms-in-three-dimensions","display_name":"Rotation formalisms in three dimensions","score":0.7460834980010986},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.7406750917434692},{"id":"https://openalex.org/keywords/executable","display_name":"Executable","score":0.7172449827194214},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.6102128028869629},{"id":"https://openalex.org/keywords/model-checking","display_name":"Model checking","score":0.5505670309066772},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.526559591293335},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.5176796913146973},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.4905654788017273},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.45620107650756836},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3411826193332672},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2571524977684021}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8632668256759644},{"id":"https://openalex.org/C171018156","wikidata":"https://www.wikidata.org/wiki/Q7370306","display_name":"Rotation formalisms in three dimensions","level":2,"score":0.7460834980010986},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.7406750917434692},{"id":"https://openalex.org/C160145156","wikidata":"https://www.wikidata.org/wiki/Q778586","display_name":"Executable","level":2,"score":0.7172449827194214},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.6102128028869629},{"id":"https://openalex.org/C110251889","wikidata":"https://www.wikidata.org/wiki/Q1569697","display_name":"Model checking","level":2,"score":0.5505670309066772},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.526559591293335},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.5176796913146973},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.4905654788017273},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.45620107650756836},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3411826193332672},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2571524977684021},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hldvt.2010.5496662","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2010.5496662","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE International High Level Design Validation and Test Workshop (HLDVT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.44999998807907104}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W326353637","https://openalex.org/W953200356","https://openalex.org/W1501077214","https://openalex.org/W1548168045","https://openalex.org/W1548312885","https://openalex.org/W1575212675","https://openalex.org/W1591313063","https://openalex.org/W1826166329","https://openalex.org/W1857327297","https://openalex.org/W1888147809","https://openalex.org/W1996109622","https://openalex.org/W2024390509","https://openalex.org/W2049925868","https://openalex.org/W2081938726","https://openalex.org/W2097117297","https://openalex.org/W2099316112","https://openalex.org/W2102387714","https://openalex.org/W2104869032","https://openalex.org/W2111982322","https://openalex.org/W2115716046","https://openalex.org/W2127044011","https://openalex.org/W2127335869","https://openalex.org/W2128904268","https://openalex.org/W2130088511","https://openalex.org/W2160566592","https://openalex.org/W2172052797","https://openalex.org/W3151776607","https://openalex.org/W4214486263","https://openalex.org/W4249778561","https://openalex.org/W6675881260","https://openalex.org/W6676983624"],"related_works":["https://openalex.org/W57206970","https://openalex.org/W2360304673","https://openalex.org/W2037121848","https://openalex.org/W4312733571","https://openalex.org/W2006962382","https://openalex.org/W2149716943","https://openalex.org/W4315606162","https://openalex.org/W2340807904","https://openalex.org/W1547517160","https://openalex.org/W1483297389"],"abstract_inverted_index":{"Although":[0],"communication":[1],"fabrics":[2],"at":[3,71],"the":[4,34],"microarchitectural":[5,45,147],"level":[6,74],"are":[7,66,96,100],"mainly":[8],"composed":[9],"of":[10,44,75,87],"standard":[11],"primitives":[12,28,46],"such":[13,83],"as":[14,84,105,107],"queues":[15],"and":[16,77,98,110,132,144,151,154],"arbiters,":[17],"to":[18,25,32,50,60,78,90,120,137,149],"get":[19],"an":[20,72],"executable":[21],"model":[22,103],"one":[23],"has":[24],"connect":[26],"these":[27],"with":[29],"glue":[30],"logic":[31],"complete":[33,52],"description.":[35],"In":[36],"this":[37,117],"paper":[38],"we":[39],"identify":[40],"a":[41,121],"richer":[42],"set":[43],"that":[47,129],"allows":[48],"us":[49,59],"describe":[51],"systems":[53],"by":[54],"composition":[55],"alone.":[56],"This":[57],"enables":[58],"build":[61],"models":[62,65,95],"faster":[63],"(since":[64],"now":[67],"simply":[68],"wiring":[69],"diagrams":[70],"appropriate":[73],"abstraction)":[76],"avoid":[79],"common":[80],"modeling":[81],"errors":[82],"inadvertent":[85],"loss":[86],"data":[88],"due":[89],"incorrect":[91],"timing":[92,131],"assumptions.":[93],"Our":[94],"formal":[97],"they":[99],"used":[101],"for":[102,127,140,145],"checking":[104],"well":[106],"dynamic":[108],"validation":[109],"performance":[111],"modeling.":[112],"However,":[113],"unlike":[114],"other":[115],"formalisms":[116],"approach":[118],"leads":[119],"precise":[122],"yet":[123],"intuitive":[124],"graphical":[125],"notation":[126],"microarchitecture":[128],"captures":[130],"functionality":[133],"in":[134],"sufficient":[135],"detail":[136],"be":[138],"useful":[139],"reasoning":[141],"about":[142],"correctness":[143],"communicating":[146],"ideas":[148],"RTL":[150],"circuit":[152],"designers":[153],"validators.":[155]},"counts_by_year":[{"year":2022,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":7},{"year":2012,"cited_by_count":8}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}