{"id":"https://openalex.org/W2103772331","doi":"https://doi.org/10.1109/hldvt.2008.4695886","title":"Temporal parallel gate-level timing simulation","display_name":"Temporal parallel gate-level timing simulation","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2103772331","doi":"https://doi.org/10.1109/hldvt.2008.4695886","mag":"2103772331"},"language":"en","primary_location":{"id":"doi:10.1109/hldvt.2008.4695886","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2008.4695886","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International High Level Design Validation and Test Workshop","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040253107","display_name":"Dusung Kim","orcid":null},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Dusung Kim","raw_affiliation_strings":["Department of Electrical & Computer Engineering, University of Massachusetts, Amherst, MA, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA#TAB#","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075578327","display_name":"Maciej Ciesielski","orcid":"https://orcid.org/0000-0002-3924-3638"},"institutions":[{"id":"https://openalex.org/I24603500","display_name":"University of Massachusetts Amherst","ror":"https://ror.org/0072zz521","country_code":"US","type":"education","lineage":["https://openalex.org/I24603500"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Maciej Ciesielski","raw_affiliation_strings":["Department of Electrical & Computer Engineering, University of Massachusetts, Amherst, MA, USA","Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Computer Engineering, University of Massachusetts, Amherst, MA, USA","institution_ids":["https://openalex.org/I24603500"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA#TAB#","institution_ids":["https://openalex.org/I24603500"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076899377","display_name":"Kyu-Ho Shim","orcid":"https://orcid.org/0000-0002-0462-6022"},"institutions":[{"id":"https://openalex.org/I4921948","display_name":"Pusan National University","ror":"https://ror.org/01an57a31","country_code":"KR","type":"education","lineage":["https://openalex.org/I4921948"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Kyuho Shim","raw_affiliation_strings":["Department of Computer Engineering, Pusan National University, Busan, South Korea","[Dept. of Comput. Eng., Pusan Nat. Univ., Busan]"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Pusan National University, Busan, South Korea","institution_ids":["https://openalex.org/I4921948"]},{"raw_affiliation_string":"[Dept. of Comput. Eng., Pusan Nat. Univ., Busan]","institution_ids":["https://openalex.org/I4921948"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073876009","display_name":"Seiyang Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I4921948","display_name":"Pusan National University","ror":"https://ror.org/01an57a31","country_code":"KR","type":"education","lineage":["https://openalex.org/I4921948"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seiyang Yang","raw_affiliation_strings":["Department of Computer Engineering, Pusan National University, Busan, South Korea","[Dept. of Comput. Eng., Pusan Nat. Univ., Busan]"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Pusan National University, Busan, South Korea","institution_ids":["https://openalex.org/I4921948"]},{"raw_affiliation_string":"[Dept. of Comput. Eng., Pusan Nat. Univ., Busan]","institution_ids":["https://openalex.org/I4921948"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5040253107"],"corresponding_institution_ids":["https://openalex.org/I24603500"],"apc_list":null,"apc_paid":null,"fwci":0.8756,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.7955965,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"2005","issue":null,"first_page":"111","last_page":"116"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},"topics":[{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7984281778335571},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7136482000350952},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7126102447509766},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.6866569519042969},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.6828606724739075},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5664834976196289},{"id":"https://openalex.org/keywords/discrete-event-simulation","display_name":"Discrete event simulation","score":0.48908883333206177},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.27432936429977417},{"id":"https://openalex.org/keywords/simulation","display_name":"Simulation","score":0.26444000005722046},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.22555699944496155}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7984281778335571},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7136482000350952},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7126102447509766},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.6866569519042969},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.6828606724739075},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5664834976196289},{"id":"https://openalex.org/C147203929","wikidata":"https://www.wikidata.org/wiki/Q574814","display_name":"Discrete event simulation","level":2,"score":0.48908883333206177},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.27432936429977417},{"id":"https://openalex.org/C44154836","wikidata":"https://www.wikidata.org/wiki/Q45045","display_name":"Simulation","level":1,"score":0.26444000005722046},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.22555699944496155},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":5,"locations":[{"id":"doi:10.1109/hldvt.2008.4695886","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2008.4695886","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International High Level Design Validation and Test Workshop","raw_type":"proceedings-article"},{"id":"pmh:oai:scholarworks.umass.edu:ece_faculty_pubs-1193","is_oa":false,"landing_page_url":"https://scholarworks.umass.edu/ece_faculty_pubs/194","pdf_url":null,"source":{"id":"https://openalex.org/S4306402057","display_name":"Scholarworks (University of Massachusetts Amherst)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I24603500","host_organization_name":"University of Massachusetts Amherst","host_organization_lineage":["https://openalex.org/I24603500"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Electrical and Computer Engineering Faculty Publication Series","raw_type":"text"},{"id":"pmh:oai:scholarworks.umass.edu:math_faculty_pubs-1584","is_oa":false,"landing_page_url":"https://scholarworks.umass.edu/math_faculty_pubs/585","pdf_url":null,"source":{"id":"https://openalex.org/S4306402057","display_name":"Scholarworks (University of Massachusetts Amherst)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I24603500","host_organization_name":"University of Massachusetts Amherst","host_organization_lineage":["https://openalex.org/I24603500"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Mathematics and Statistics Department Faculty Publication Series","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.153.5389","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.153.5389","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ecs.umass.edu/ece/labs/vlsicad/papers/HLDVT-08_v8_mc.pdf","raw_type":"text"},{"id":"pmh:oai:scholarworks.umass.edu:20.500.14394/20977","is_oa":false,"landing_page_url":"https://hdl.handle.net/20.500.14394/20977","pdf_url":null,"source":{"id":"https://openalex.org/S4306402240","display_name":"ScholarWorks@UMassAmherst (University of Massachusetts Amherst)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I24603500","host_organization_name":"University of Massachusetts Amherst","host_organization_lineage":["https://openalex.org/I24603500"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"published","raw_type":"article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W51933324","https://openalex.org/W1531818788","https://openalex.org/W2027746898","https://openalex.org/W2118900647","https://openalex.org/W2123990187","https://openalex.org/W2132721535","https://openalex.org/W2152247556","https://openalex.org/W2159284613","https://openalex.org/W2481725867","https://openalex.org/W4252947404","https://openalex.org/W6602069470","https://openalex.org/W6657184987","https://openalex.org/W6682695352","https://openalex.org/W6683993923"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2027972911","https://openalex.org/W1966837078","https://openalex.org/W2136392782","https://openalex.org/W3152436111","https://openalex.org/W4242401699","https://openalex.org/W1549757192"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3,29],"radically":[4],"different":[5],"approach":[6],"to":[7,38,49],"parallel":[8,34,56],"simulation":[9,57,61,65,83],"for":[10,78],"gate":[11],"level":[12],"design,":[13],"aimed":[14],"at":[15],"completely":[16],"eliminating":[17],"the":[18,44,53,59],"communication":[19],"and":[20,81],"synchronization":[21],"overhead":[22],"between":[23],"simulators.":[24],"It":[25],"is":[26,76],"based":[27],"on":[28],"new":[30],"concept":[31],"of":[32],"temporal":[33,55,68],"simulation:":[35],"in":[36,67],"contrast":[37],"traditional,":[39],"spatially-distributed":[40],"simulation,":[41],"which":[42],"partitions":[43,58],"design":[45],"into":[46,63],"multiple":[47,64],"modules":[48],"be":[50],"simulated":[51],"concurrently,":[52],"proposed":[54],"single":[60],"run":[62],"runs":[66],"domain.":[69],"Experimental":[70],"results":[71],"demonstrate":[72],"that":[73],"linear":[74],"speedup":[75],"possible":[77],"large":[79],"designs":[80],"long":[82],"runs.":[84]},"counts_by_year":[{"year":2020,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
