{"id":"https://openalex.org/W2151046966","doi":"https://doi.org/10.1109/hldvt.2005.1568816","title":"Cosimulation of ITRON-based embedded software with systemc","display_name":"Cosimulation of ITRON-based embedded software with systemc","publication_year":2006,"publication_date":"2006-01-18","ids":{"openalex":"https://openalex.org/W2151046966","doi":"https://doi.org/10.1109/hldvt.2005.1568816","mag":"2151046966"},"language":"en","primary_location":{"id":"doi:10.1109/hldvt.2005.1568816","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2005.1568816","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Tenth IEEE International High-Level Design Validation and Test Workshop, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://nagoya.repo.nii.ac.jp/records/5242","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005507291","display_name":"S. Chikada","orcid":null},"institutions":[{"id":"https://openalex.org/I60134161","display_name":"Nagoya University","ror":"https://ror.org/04chrp450","country_code":"JP","type":"education","lineage":["https://openalex.org/I60134161"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"S. Chikada","raw_affiliation_strings":["Graduate School of Information Science, University of Nagoya, Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of Information Science, University of Nagoya, Japan","institution_ids":["https://openalex.org/I60134161"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018396117","display_name":"Shinya Honda","orcid":"https://orcid.org/0000-0002-3547-6768"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Honda","raw_affiliation_strings":["Information Technology Center, University of Nagoya, Japan"],"affiliations":[{"raw_affiliation_string":"Information Technology Center, University of Nagoya, Japan","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000257232","display_name":"Hiroyuki Tomiyama","orcid":"https://orcid.org/0000-0003-1655-7877"},"institutions":[{"id":"https://openalex.org/I60134161","display_name":"Nagoya University","ror":"https://ror.org/04chrp450","country_code":"JP","type":"education","lineage":["https://openalex.org/I60134161"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Tomiyama","raw_affiliation_strings":["Graduate School of Information Science, University of Nagoya, Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of Information Science, University of Nagoya, Japan","institution_ids":["https://openalex.org/I60134161"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032678689","display_name":"Hiroaki Takada","orcid":"https://orcid.org/0000-0003-3544-2397"},"institutions":[{"id":"https://openalex.org/I60134161","display_name":"Nagoya University","ror":"https://ror.org/04chrp450","country_code":"JP","type":"education","lineage":["https://openalex.org/I60134161"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"H. Takada","raw_affiliation_strings":["Graduate School of Information Science, University of Nagoya, Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of Information Science, University of Nagoya, Japan","institution_ids":["https://openalex.org/I60134161"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5005507291"],"corresponding_institution_ids":["https://openalex.org/I60134161"],"apc_list":null,"apc_paid":null,"fwci":0.5676,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.6833113,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"71","last_page":"76"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9828488826751709},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7912945747375488},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7160590291023254},{"id":"https://openalex.org/keywords/embedded-software","display_name":"Embedded software","score":0.6105160713195801},{"id":"https://openalex.org/keywords/kernel","display_name":"Kernel (algebra)","score":0.5617250800132751},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5503368973731995},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4421323537826538},{"id":"https://openalex.org/keywords/real-time-operating-system","display_name":"Real-time operating system","score":0.4228423237800598},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.42239969968795776},{"id":"https://openalex.org/keywords/transaction-level-modeling","display_name":"Transaction-level modeling","score":0.41576844453811646},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23570919036865234}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9828488826751709},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7912945747375488},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7160590291023254},{"id":"https://openalex.org/C154488198","wikidata":"https://www.wikidata.org/wiki/Q1335007","display_name":"Embedded software","level":3,"score":0.6105160713195801},{"id":"https://openalex.org/C74193536","wikidata":"https://www.wikidata.org/wiki/Q574844","display_name":"Kernel (algebra)","level":2,"score":0.5617250800132751},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5503368973731995},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4421323537826538},{"id":"https://openalex.org/C28472234","wikidata":"https://www.wikidata.org/wiki/Q213666","display_name":"Real-time operating system","level":2,"score":0.4228423237800598},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.42239969968795776},{"id":"https://openalex.org/C169571997","wikidata":"https://www.wikidata.org/wiki/Q966099","display_name":"Transaction-level modeling","level":3,"score":0.41576844453811646},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23570919036865234},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/hldvt.2005.1568816","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2005.1568816","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Tenth IEEE International High-Level Design Validation and Test Workshop, 2005.","raw_type":"proceedings-article"},{"id":"pmh:oai:irdb.nii.ac.jp:01152:0001448390","is_oa":true,"landing_page_url":"https://nagoya.repo.nii.ac.jp/records/5242","pdf_url":null,"source":{"id":"https://openalex.org/S7407056385","display_name":"Institutional Repositories DataBase (IRDB)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184597095","host_organization_name":"National Institute of Informatics","host_organization_lineage":["https://openalex.org/I184597095"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Tenth IEEE International on High-Level Design Validation and Test Workshop, 30 Nov-2 Dec 2005","raw_type":"journal article"}],"best_oa_location":{"id":"pmh:oai:irdb.nii.ac.jp:01152:0001448390","is_oa":true,"landing_page_url":"https://nagoya.repo.nii.ac.jp/records/5242","pdf_url":null,"source":{"id":"https://openalex.org/S7407056385","display_name":"Institutional Repositories DataBase (IRDB)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184597095","host_organization_name":"National Institute of Informatics","host_organization_lineage":["https://openalex.org/I184597095"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Tenth IEEE International on High-Level Design Validation and Test Workshop, 30 Nov-2 Dec 2005","raw_type":"journal article"},"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320334764","display_name":"Japan Society for the Promotion of Science","ror":"https://ror.org/00hhkn466"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1516142763","https://openalex.org/W2103591545","https://openalex.org/W2103686345","https://openalex.org/W2103910872","https://openalex.org/W2130163312","https://openalex.org/W2138863419","https://openalex.org/W2149092581","https://openalex.org/W2169537375","https://openalex.org/W4229879623","https://openalex.org/W4229916151","https://openalex.org/W4244469666","https://openalex.org/W4247732906","https://openalex.org/W6682061485"],"related_works":["https://openalex.org/W1525398417","https://openalex.org/W2532163536","https://openalex.org/W2266880325","https://openalex.org/W2069603759","https://openalex.org/W2533881872","https://openalex.org/W3146089259","https://openalex.org/W2112120387","https://openalex.org/W1981924702","https://openalex.org/W2116103175","https://openalex.org/W1486333474"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3,21,40],"RTOS-centric":[4],"timed":[5],"cosimulation":[6,15,43],"with":[7,29],"SystemC":[8,18],"for":[9],"embedded":[10],"system":[11],"design.":[12],"In":[13],"our":[14],"environment,":[16],"a":[17,35],"simulator":[19],"and":[20,27],"RTOS":[22],"kernel":[23],"model":[24],"are":[25],"communicated":[26],"synchronized":[28],"each":[30],"other.":[31],"Our":[32],"experiment":[33],"using":[34],"JPEG":[36],"decoder":[37],"example":[38],"demonstrates":[39],"improvement":[41],"in":[42],"speed":[44],"over":[45],"traditional":[46],"HDL-based":[47],"cosimulation.":[48]},"counts_by_year":[],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}