{"id":"https://openalex.org/W2051291427","doi":"https://doi.org/10.1109/hldvt.2004.1431267","title":"On equivalence checking between behavioral and RTL descriptions","display_name":"On equivalence checking between behavioral and RTL descriptions","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W2051291427","doi":"https://doi.org/10.1109/hldvt.2004.1431267","mag":"2051291427"},"language":"en","primary_location":{"id":"doi:10.1109/hldvt.2004.1431267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2004.1431267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. Ninth IEEE International High-Level Design Validation and Test Workshop (IEEE Cat. No.04EX940)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027837299","display_name":"Masahiro Fujita","orcid":"https://orcid.org/0000-0002-6516-4175"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"M. Fujita","raw_affiliation_strings":["VLSI Design and Education Center, University of Tokyo, Bunkyo, Tokyo, Japan","VLSI Design & Educ. Center, Tokyo Univ., Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Design and Education Center, University of Tokyo, Bunkyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]},{"raw_affiliation_string":"VLSI Design & Educ. Center, Tokyo Univ., Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5027837299"],"corresponding_institution_ids":["https://openalex.org/I74801974"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"179","last_page":"184"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/formal-equivalence-checking","display_name":"Formal equivalence checking","score":0.7940715551376343},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7488574981689453},{"id":"https://openalex.org/keywords/equivalence","display_name":"Equivalence (formal languages)","score":0.6645396947860718},{"id":"https://openalex.org/keywords/register-transfer-level","display_name":"Register-transfer level","score":0.6597297787666321},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6049362421035767},{"id":"https://openalex.org/keywords/functional-equivalence","display_name":"Functional equivalence","score":0.5558115243911743},{"id":"https://openalex.org/keywords/behavioral-modeling","display_name":"Behavioral modeling","score":0.4945056140422821},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.41243356466293335},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3932180106639862},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3611506223678589},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.30924490094184875},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.2948017120361328},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2648490071296692},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1930791735649109},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.15834075212478638},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.1449352502822876},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08188506960868835},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.08106964826583862}],"concepts":[{"id":"https://openalex.org/C96654402","wikidata":"https://www.wikidata.org/wiki/Q5469962","display_name":"Formal equivalence checking","level":3,"score":0.7940715551376343},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7488574981689453},{"id":"https://openalex.org/C2780069185","wikidata":"https://www.wikidata.org/wiki/Q7977945","display_name":"Equivalence (formal languages)","level":2,"score":0.6645396947860718},{"id":"https://openalex.org/C34854456","wikidata":"https://www.wikidata.org/wiki/Q1484552","display_name":"Register-transfer level","level":4,"score":0.6597297787666321},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6049362421035767},{"id":"https://openalex.org/C2988012377","wikidata":"https://www.wikidata.org/wiki/Q29966452","display_name":"Functional equivalence","level":2,"score":0.5558115243911743},{"id":"https://openalex.org/C78639753","wikidata":"https://www.wikidata.org/wiki/Q3318160","display_name":"Behavioral modeling","level":2,"score":0.4945056140422821},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.41243356466293335},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3932180106639862},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3611506223678589},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.30924490094184875},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.2948017120361328},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2648490071296692},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1930791735649109},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.15834075212478638},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.1449352502822876},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08188506960868835},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.08106964826583862},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hldvt.2004.1431267","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hldvt.2004.1431267","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. Ninth IEEE International High-Level Design Validation and Test Workshop (IEEE Cat. No.04EX940)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/8","score":0.46000000834465027,"display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W53653091","https://openalex.org/W74242707","https://openalex.org/W1495760906","https://openalex.org/W1531082202","https://openalex.org/W1559507652","https://openalex.org/W2069560114","https://openalex.org/W2091355737","https://openalex.org/W2109238268","https://openalex.org/W2116242425","https://openalex.org/W2137558955","https://openalex.org/W2152016786","https://openalex.org/W2171999426","https://openalex.org/W2345711131","https://openalex.org/W4234223684","https://openalex.org/W4241530675","https://openalex.org/W4254412902","https://openalex.org/W6704668067"],"related_works":["https://openalex.org/W2336971100","https://openalex.org/W4241206086","https://openalex.org/W4283699709","https://openalex.org/W2035731992","https://openalex.org/W2543290882","https://openalex.org/W2004144979","https://openalex.org/W2109697164","https://openalex.org/W2895905110","https://openalex.org/W2051291427","https://openalex.org/W2112832996"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"present":[4],"techniques":[5],"for":[6],"comparison":[7],"between":[8,35],"behavioral":[9,36],"level":[10,14,37],"and":[11,25,38],"register":[12],"transfer":[13],"(RTL)":[15],"design":[16,64],"descriptions":[17],"by":[18],"mapping":[19],"the":[20,33,46],"designs":[21,40],"into":[22],"virtual":[23,26],"controllers":[24],"datapaths.":[27],"We":[28],"also":[29],"discuss":[30],"about":[31],"how":[32],"equivalence":[34],"RTL":[39],"can":[41],"be":[42],"defined":[43],"precisely":[44],"using":[45],"proposed":[47],"\"attribute":[48],"statements\"":[49],"in":[50],"an":[51],"interactive":[52],"fashion.":[53],"Implementation":[54],"issues":[55],"as":[56,58,68],"well":[57],"considerations":[59],"on":[60],"real":[61],"life":[62],"industrial":[63],"examples":[65],"are":[66],"presented":[67],"well.":[69]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}