{"id":"https://openalex.org/W2104677829","doi":"https://doi.org/10.1109/hipc.2009.5433219","title":"HiPPAI: High Performance Portable Accelerator Interface for SoCs","display_name":"HiPPAI: High Performance Portable Accelerator Interface for SoCs","publication_year":2009,"publication_date":"2009-12-01","ids":{"openalex":"https://openalex.org/W2104677829","doi":"https://doi.org/10.1109/hipc.2009.5433219","mag":"2104677829"},"language":"en","primary_location":{"id":"doi:10.1109/hipc.2009.5433219","doi":"https://doi.org/10.1109/hipc.2009.5433219","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hipc.2009.5433219","pdf_url":null,"source":{"id":"https://openalex.org/S7407088234","display_name":"International Conference on High Performance Computing (HiPC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on High Performance Computing (HiPC)","raw_type":"proceedings-article"},"volume":null,"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072581880","display_name":"Paul M. Stillwell","orcid":null,"observed_orcids":[]},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Paul M. Stillwell","raw_affiliation_strings":[],"raw_orcid":null,"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5058487266","display_name":"Vineet Chadha","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vineet Chadha","raw_affiliation_strings":["Intel (United States), Santa Clara, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003931059","display_name":"Omesh Tickoo","orcid":"https://orcid.org/0000-0002-3142-1938","observed_orcids":["https://orcid.org/0000-0002-3142-1938"]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Omesh Tickoo","raw_affiliation_strings":["Intel (United States), Santa Clara, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068233154","display_name":"Steven L. Zhang","orcid":"https://orcid.org/0000-0002-4465-1812","observed_orcids":["https://orcid.org/0000-0002-4465-1812","https://orcid.org/0000-0002-0139-481X"]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Steven Zhang","raw_affiliation_strings":["Intel (United States), Santa Clara, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088669728","display_name":"Ramesh Illikkal","orcid":"https://orcid.org/0009-0002-0735-9203","observed_orcids":["https://orcid.org/0009-0002-0735-9203"]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ramesh Illikkal","raw_affiliation_strings":["Intel (United States), Santa Clara, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111987814","display_name":"Ravi Iyer","orcid":"https://orcid.org/0000-0001-5383-9561","observed_orcids":["https://orcid.org/0000-0001-5383-9561"]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ravi Iyer","raw_affiliation_strings":["Intel (United States), Santa Clara, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110280135","display_name":"Don Newell","orcid":null,"observed_orcids":[]},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Don Newell","raw_affiliation_strings":["Intel (United States), Santa Clara, United States"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.1583,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.77976869,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"109","last_page":"118"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.0035000001080334187,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.00019999999494757503,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/hardware-accelerators","display_name":"hardware accelerators","score":0.8080000281333923},{"id":"https://openalex.org/keywords/system-on-chip","display_name":"system-on-chip","score":0.875},{"id":"https://openalex.org/keywords/mobile-augmented-reality","display_name":"mobile augmented reality","score":0.9089999794960022},{"id":"https://openalex.org/keywords/system-calls","display_name":"system calls","score":0.6990000009536743},{"id":"https://openalex.org/keywords/iommu","display_name":"IOMMU","score":0.8309999704360962}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7916538715362549},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6562502384185791},{"id":"https://openalex.org/C63000827","wikidata":"https://www.wikidata.org/wiki/Q3080428","display_name":"Software portability","level":2,"score":0.6018477082252502},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5519624352455139},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.5017433166503906},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.485900342464447},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4646804630756378},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4645144045352936},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.40999963879585266},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.34839701652526855},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34375274181365967},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hipc.2009.5433219","doi":"https://doi.org/10.1109/hipc.2009.5433219","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hipc.2009.5433219","pdf_url":null,"source":{"id":"https://openalex.org/S7407088234","display_name":"International Conference on High Performance Computing (HiPC)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"listed_in":[],"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on High Performance Computing (HiPC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"sustainable_development_goals_aurora":[{"display_name":"Industry, innovation and infrastructure","score":0.5,"id":"https://metadata.un.org/sdg/9"}],"study_designs":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1533435707","https://openalex.org/W1677409904","https://openalex.org/W1970112123","https://openalex.org/W1987231670","https://openalex.org/W2007432529","https://openalex.org/W2012694313","https://openalex.org/W2151103935","https://openalex.org/W2156368296","https://openalex.org/W6637400245"],"related_works":["https://openalex.org/W107105315","https://openalex.org/W1584537303","https://openalex.org/W4388155270","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2518118925","https://openalex.org/W2111416043","https://openalex.org/W4243399827","https://openalex.org/W3159273459"],"abstract_inverted_index":{"Specialized":[0],"hardware":[1,86,108,168,193,222],"accelerators":[2,169,195],"are":[3],"enabling":[4],"today's":[5],"System":[6],"on":[7,206,221],"Chip":[8],"(SoC)":[9],"platforms":[10,34,166],"to":[11,36,56,82,102,170,185,196,230],"target":[12],"various":[13],"applications.":[14],"In":[15,177],"this":[16],"paper":[17],"we":[18,71,118,179],"show":[19,89,119],"that":[20,49,76,90,122],"as":[21,97],"these":[22,91,115,235],"SoCs":[23],"evolve":[24,37],"in":[25,250],"complexity":[26],"and":[27,110,140,192,225,243,254],"usage,":[28],"the":[29,39,60,73,98,123,128,150,172,181,198,238,247],"programming":[30,79,130,183],"models":[31],"for":[32,145,164,187,211],"such":[33],"need":[35],"beyond":[38],"traditional":[40,251],"driver":[41],"oriented":[42],"architecture.":[43],"Using":[44],"a":[45,51,65,77,146,156],"test":[46],"set":[47],"up":[48],"employs":[50],"programmable":[52],"FPGA":[53],"based":[54,69,220],"accelerator":[55],"implement":[57],"one":[58],"of":[59,64,149,240],"critical":[61,96],"computation":[62],"functions":[63],"Mobile":[66],"Augmented":[67],"Reality":[68],"workload,":[70],"describe":[72],"performance":[74,92,151,212],"drawbacks":[75],"conventional":[78],"model":[80,204,219],"brings":[81],"compute":[83],"environments":[84],"employing":[85],"accelerators.":[87,231],"We":[88,153,232],"issues":[93],"become":[94],"more":[95],"interface":[99,184],"latencies":[100],"continue":[101],"improve":[103],"over":[104],"time":[105],"with":[106,120,135],"better":[107],"integration":[109],"efficient":[111],"interconnect":[112],"technologies.":[113],"Under":[114],"usage":[116],"scenarios,":[117],"measurements":[121],"software":[124,173,191,252],"overheads":[125,174,239],"enforced":[126],"by":[127],"current":[129],"model,":[131],"like":[132],"those":[133],"associated":[134],"system":[136,241],"calls,":[137],"memory":[138,141,217],"copy":[139],"address":[142,244],"translations":[143,245],"account":[144],"major":[147,208],"part":[148],"overheads.":[152],"then":[154],"propose":[155],"novel":[157],"High":[158],"Performance":[159],"Portable":[160],"Accelerator":[161],"Interface":[162],"(HiPPAI)":[163],"SoC":[165],"using":[167],"reduce":[171,197,237],"mentioned":[175],"above.":[176],"addition,":[178],"position":[180],"new":[182],"allow":[186],"function":[188,194,256],"portability":[189],"between":[190],"application":[199],"development":[200],"effort.":[201],"Our":[202],"proposed":[203],"relies":[205],"two":[207],"building":[209],"blocks":[210],"improvement.":[213],"A":[214],"uniform":[215],"virtual":[216],"addressing":[218],"IOMMU":[223],"support":[224],"direct":[226],"user":[227],"mode":[228],"access":[229],"demonstrate":[233],"how":[234],"enhancements":[236],"calls":[242],"at":[246],"user/kernel":[248],"boundary":[249],"stacks":[253],"enable":[255],"portability.":[257]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":6},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":4}],"updated_date":"2026-10-05T09:50:58.205359","created_date":"2025-10-10T00:00:00"}