{"id":"https://openalex.org/W2164868807","doi":"https://doi.org/10.1109/hipc.2009.5433216","title":"P-slice based efficient speculative multithreading","display_name":"P-slice based efficient speculative multithreading","publication_year":2009,"publication_date":"2009-12-01","ids":{"openalex":"https://openalex.org/W2164868807","doi":"https://doi.org/10.1109/hipc.2009.5433216","mag":"2164868807"},"language":"en","primary_location":{"id":"doi:10.1109/hipc.2009.5433216","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hipc.2009.5433216","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on High Performance Computing (HiPC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/2117/10039","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054694693","display_name":"Rakesh Ranjan","orcid":"https://orcid.org/0000-0003-0963-4512"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Rakesh Ranjan","raw_affiliation_strings":["Computer Architecture Department, Universitat Polilt\u00e8cnica de Catalunya, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Architecture Department, Universitat Polilt\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053751999","display_name":"Pedro Marcuello","orcid":null},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pedro Marcuello","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Laboratories Barcelona-UPC, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Laboratories Barcelona-UPC, Barcelona, Spain","institution_ids":["https://openalex.org/I4210136471","https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001303924","display_name":"Fernando Latorre","orcid":"https://orcid.org/0009-0004-6313-6471"},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Fernando Latorre","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Laboratories Barcelona-UPC, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Laboratories Barcelona-UPC, Barcelona, Spain","institution_ids":["https://openalex.org/I4210136471","https://openalex.org/I9617848"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100733331","display_name":"Antonio Gonz\u00e1lez","orcid":"https://orcid.org/0000-0002-0009-0996"},"institutions":[{"id":"https://openalex.org/I4210136471","display_name":"FC Barcelona","ror":"https://ror.org/04bpz1v84","country_code":"ES","type":"other","lineage":["https://openalex.org/I4210136471"]},{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antonio Gonzalez","raw_affiliation_strings":["Intel Barcelona Research Center, Intel Laboratories Barcelona-UPC, Barcelona, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Barcelona Research Center, Intel Laboratories Barcelona-UPC, Barcelona, Spain","institution_ids":["https://openalex.org/I4210136471","https://openalex.org/I9617848"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"119","last_page":"128"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.8868486881256104},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7730562686920166},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.6707546710968018},{"id":"https://openalex.org/keywords/speculative-multithreading","display_name":"Speculative multithreading","score":0.6694726943969727},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.6280314326286316},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.6141524314880371},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.6017165184020996},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.587644100189209},{"id":"https://openalex.org/keywords/simultaneous-multithreading","display_name":"Simultaneous multithreading","score":0.5332852005958557},{"id":"https://openalex.org/keywords/performance-improvement","display_name":"Performance improvement","score":0.5168864727020264},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4837760627269745},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47393089532852173},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.43439194560050964},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.35076987743377686},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18729984760284424},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13790985941886902}],"concepts":[{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.8868486881256104},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7730562686920166},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.6707546710968018},{"id":"https://openalex.org/C15296174","wikidata":"https://www.wikidata.org/wiki/Q7575343","display_name":"Speculative multithreading","level":4,"score":0.6694726943969727},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.6280314326286316},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.6141524314880371},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.6017165184020996},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.587644100189209},{"id":"https://openalex.org/C85717602","wikidata":"https://www.wikidata.org/wiki/Q82178","display_name":"Simultaneous multithreading","level":4,"score":0.5332852005958557},{"id":"https://openalex.org/C2778915421","wikidata":"https://www.wikidata.org/wiki/Q3643177","display_name":"Performance improvement","level":2,"score":0.5168864727020264},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4837760627269745},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47393089532852173},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.43439194560050964},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.35076987743377686},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18729984760284424},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13790985941886902},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/hipc.2009.5433216","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hipc.2009.5433216","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on High Performance Computing (HiPC)","raw_type":"proceedings-article"},{"id":"pmh:oai:recercat.cat:2072/189716","is_oa":true,"landing_page_url":"http://hdl.handle.net/2117/10039","pdf_url":null,"source":{"id":"https://openalex.org/S4306402147","display_name":"RECERCAT (Consorci de Serveis Universitaris de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210090028","host_organization_name":"Consorci de Serveis Universitaris de Catalunya","host_organization_lineage":["https://openalex.org/I4210090028"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.963.5941","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.963.5941","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://upcommons.upc.edu/bitstream/handle/2117/10039/Ranjan.pdf%3Bjsessionid%3DA3026D87A77F5F9FBD5452BA36A4DC35?sequence%3D1","raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:recercat.cat:2072/189716","is_oa":true,"landing_page_url":"http://hdl.handle.net/2117/10039","pdf_url":null,"source":{"id":"https://openalex.org/S4306402147","display_name":"RECERCAT (Consorci de Serveis Universitaris de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210090028","host_organization_name":"Consorci de Serveis Universitaris de Catalunya","host_organization_lineage":["https://openalex.org/I4210090028"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.49000000953674316}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W121029738","https://openalex.org/W1525227808","https://openalex.org/W1920053666","https://openalex.org/W2002219828","https://openalex.org/W2002549773","https://openalex.org/W2024547254","https://openalex.org/W2097230158","https://openalex.org/W2099089002","https://openalex.org/W2100184706","https://openalex.org/W2103224933","https://openalex.org/W2111905231","https://openalex.org/W2114067856","https://openalex.org/W2120518487","https://openalex.org/W2125340270","https://openalex.org/W2131498141","https://openalex.org/W2137239834","https://openalex.org/W2142501881","https://openalex.org/W2144344516","https://openalex.org/W2146173591","https://openalex.org/W2146647271","https://openalex.org/W2155410188","https://openalex.org/W2161943885","https://openalex.org/W2162523628","https://openalex.org/W2164738518","https://openalex.org/W2165856991","https://openalex.org/W2168657810","https://openalex.org/W2296006986","https://openalex.org/W3013744194","https://openalex.org/W3142830919","https://openalex.org/W4231131543","https://openalex.org/W4235388166","https://openalex.org/W4242484660","https://openalex.org/W4244841987","https://openalex.org/W4245632002","https://openalex.org/W4245971498","https://openalex.org/W4246178214","https://openalex.org/W4246485703","https://openalex.org/W6604917444","https://openalex.org/W6640197266","https://openalex.org/W6650841601","https://openalex.org/W6656450206","https://openalex.org/W6674487471","https://openalex.org/W6684098546","https://openalex.org/W6684226618"],"related_works":["https://openalex.org/W1999755551","https://openalex.org/W2115561485","https://openalex.org/W1985089255","https://openalex.org/W1541942136","https://openalex.org/W1976136846","https://openalex.org/W2153202644","https://openalex.org/W94981340","https://openalex.org/W2003413578","https://openalex.org/W2621634031","https://openalex.org/W2164868807"],"abstract_inverted_index":{"Microprocessor":[0],"industry":[1],"has":[2,46],"recently":[3],"shifted":[4],"towards":[5],"multi-core":[6,24,59],"to":[7,32,38,52,89,105,140,167],"take":[8],"advantage":[9],"of":[10,15,55,69,109,128,157,191],"the":[11,19,23,35,50,66,74,78,107,110,122,126,155,160,165],"ever":[12],"increasing":[13],"number":[14,156],"transistors":[16],"provided":[17],"by":[18,134,163,181],"new":[20],"technologies.":[21],"Unfortunately,":[22],"approach":[25],"does":[26,116],"not":[27,117],"allow":[28,87],"single":[29,95,169],"threaded":[30,96],"applications":[31,57],"benefit":[33],"from":[34],"additional":[36,119],"cores":[37],"improve":[39,106],"their":[40],"execution":[41],"time.":[42],"Speculative":[43],"multithreading":[44],"(SpMT)":[45],"been":[47],"proposed":[48],"in":[49,58,121,159],"past":[51],"boost":[53],"performance":[54,108,127],"irregular":[56],"environments.":[60],"In":[61],"this":[62],"work,":[63],"we":[64,146],"study":[65],"main":[67],"bottlenecks":[68],"these":[70],"architectures,":[71],"such":[72],"as":[73,102],"memory":[75,112,132],"behavior":[76],"and":[77,81,124,138,183],"pre-computation":[79,161],"slices":[80,162,180],"propose":[82,99,147],"two":[83],"novel":[84],"schemes":[85,178],"that":[86,153],"SpMT":[88,111,131,196],"get":[90],"25%":[91],"average":[92,137],"speedup":[93],"over":[94,193],"execution.":[97],"We":[98],"Selective":[100],"Replication":[101],"a":[103,129,148,194],"technique":[104,115],"system.":[113],"This":[114],"introduce":[118],"traffic":[120],"bus":[123],"improves":[125],"conventional":[130,195],"model":[133],"6%":[135],"on":[136],"up":[139],"21%":[141],"for":[142],"some":[143],"applications.":[144],"Also,":[145],"scheme":[149],"called":[150],"Slice":[151],"Specialization":[152],"reduces":[154],"instructions":[158],"adapting":[164],"slice":[166],"every":[168],"speculative":[170],"thread":[171],"spawned.":[172],"The":[173],"later":[174],"proposal":[175],"outperforms":[176],"previous":[177],"with":[179],"15%":[182],"overall,":[184],"both":[185],"techniques":[186],"combined":[187],"achieve":[188],"an":[189],"improvement":[190],"20%":[192],"processor.":[197]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}
