{"id":"https://openalex.org/W3207190350","doi":"https://doi.org/10.1109/hcs52781.2021.9567038","title":"X<sup>e</sup> <sub>HPC</sub> Ponte Vecchio","display_name":"X<sup>e</sup> <sub>HPC</sub> Ponte Vecchio","publication_year":2021,"publication_date":"2021-08-22","ids":{"openalex":"https://openalex.org/W3207190350","doi":"https://doi.org/10.1109/hcs52781.2021.9567038","mag":"3207190350"},"language":"en","primary_location":{"id":"doi:10.1109/hcs52781.2021.9567038","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hcs52781.2021.9567038","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE Hot Chips 33 Symposium (HCS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047742158","display_name":"David Blythe","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"David Blythe","raw_affiliation_strings":["Intel, Chief GPU Architect"],"affiliations":[{"raw_affiliation_string":"Intel, Chief GPU Architect","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5047742158"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":1.0697,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.78745773,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"34"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.1348000019788742,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.1348000019788742,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7194036245346069},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.7038262486457825},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.6949247121810913},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5871739387512207},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5851062536239624},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.50826495885849},{"id":"https://openalex.org/keywords/scale","display_name":"Scale (ratio)","score":0.48914721608161926},{"id":"https://openalex.org/keywords/supercomputer","display_name":"Supercomputer","score":0.4471021592617035},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2215767800807953},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21968600153923035},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09535953402519226}],"concepts":[{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7194036245346069},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.7038262486457825},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.6949247121810913},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5871739387512207},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5851062536239624},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.50826495885849},{"id":"https://openalex.org/C2778755073","wikidata":"https://www.wikidata.org/wiki/Q10858537","display_name":"Scale (ratio)","level":2,"score":0.48914721608161926},{"id":"https://openalex.org/C83283714","wikidata":"https://www.wikidata.org/wiki/Q121117","display_name":"Supercomputer","level":2,"score":0.4471021592617035},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2215767800807953},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21968600153923035},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09535953402519226},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/hcs52781.2021.9567038","is_oa":false,"landing_page_url":"https://doi.org/10.1109/hcs52781.2021.9567038","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE Hot Chips 33 Symposium (HCS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.4399999976158142,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2384867379","https://openalex.org/W4400094300","https://openalex.org/W2329539859","https://openalex.org/W2227905990","https://openalex.org/W2765823764","https://openalex.org/W3214280620","https://openalex.org/W2889526943","https://openalex.org/W1582436825","https://openalex.org/W1996803181","https://openalex.org/W2979588510"],"abstract_inverted_index":{"500X":[0],"Increase":[1],"In":[2],"Compute":[3,6],"Performance":[4],"Scalable":[5],"&":[7,10,14],"Memory":[8],"Packaging":[9],"Interconnect":[11],"For":[12],"Density":[13],"Scale":[15],"Full":[16],"Software":[17],"Stack/Programming":[18],"Model":[19]},"counts_by_year":[{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
