{"id":"https://openalex.org/W1510230419","doi":"https://doi.org/10.1109/glsv.1997.580404","title":"A 1.4 Gbit/s CMOS driver for 50 \u03a9 ECL systems","display_name":"A 1.4 Gbit/s CMOS driver for 50 \u03a9 ECL systems","publication_year":2002,"publication_date":"2002-11-22","ids":{"openalex":"https://openalex.org/W1510230419","doi":"https://doi.org/10.1109/glsv.1997.580404","mag":"1510230419"},"language":"en","primary_location":{"id":"doi:10.1109/glsv.1997.580404","is_oa":false,"landing_page_url":"https://doi.org/10.1109/glsv.1997.580404","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Great Lakes Symposium on VLSI","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004462190","display_name":"J Navarro","orcid":"https://orcid.org/0000-0002-1975-2267"},"institutions":[{"id":"https://openalex.org/I4210099111","display_name":"Association of the Technological Integrated Systems Laboratory","ror":"https://ror.org/00wp8rt14","country_code":"BR","type":"nonprofit","lineage":["https://openalex.org/I4210099111"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"J. Navarro S.","raw_affiliation_strings":["Lab. de Sistemas Integraveis, Sao Paulo Univ., Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Lab. de Sistemas Integraveis, Sao Paulo Univ., Brazil","institution_ids":["https://openalex.org/I4210099111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020178167","display_name":"R.P. Silveira","orcid":null},"institutions":[{"id":"https://openalex.org/I4210099111","display_name":"Association of the Technological Integrated Systems Laboratory","ror":"https://ror.org/00wp8rt14","country_code":"BR","type":"nonprofit","lineage":["https://openalex.org/I4210099111"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"R. Silveira","raw_affiliation_strings":["Laboratbrio de Sistemas Integr\u00e3veis, PEE EPUSP University, S\u00e3o Paulo, Sao Paulo, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratbrio de Sistemas Integr\u00e3veis, PEE EPUSP University, S\u00e3o Paulo, Sao Paulo, Brazil","institution_ids":["https://openalex.org/I4210099111"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084060373","display_name":"F.L. Romao","orcid":null},"institutions":[{"id":"https://openalex.org/I4210099111","display_name":"Association of the Technological Integrated Systems Laboratory","ror":"https://ror.org/00wp8rt14","country_code":"BR","type":"nonprofit","lineage":["https://openalex.org/I4210099111"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"F.L. Romao","raw_affiliation_strings":["Laboratbrio de Sistemas Integr\u00e3veis, PEE EPUSP University, S\u00e3o Paulo, Sao Paulo, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratbrio de Sistemas Integr\u00e3veis, PEE EPUSP University, S\u00e3o Paulo, Sao Paulo, Brazil","institution_ids":["https://openalex.org/I4210099111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5021177341","display_name":"Wilhelmus Van Noije","orcid":"https://orcid.org/0000-0002-9010-3083"},"institutions":[{"id":"https://openalex.org/I4210099111","display_name":"Association of the Technological Integrated Systems Laboratory","ror":"https://ror.org/00wp8rt14","country_code":"BR","type":"nonprofit","lineage":["https://openalex.org/I4210099111"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"W.A.M. Van Noije","raw_affiliation_strings":["Laboratbrio de Sistemas Integr\u00e3veis, PEE EPUSP University, S\u00e3o Paulo, Sao Paulo, Brazil"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Laboratbrio de Sistemas Integr\u00e3veis, PEE EPUSP University, S\u00e3o Paulo, Sao Paulo, Brazil","institution_ids":["https://openalex.org/I4210099111"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210099111"],"apc_list":null,"apc_paid":null,"fwci":0.355,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.45973886,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"i","issue":null,"first_page":"14","last_page":"18"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/synchronous-optical-networking","display_name":"Synchronous optical networking","score":0.9236714839935303},{"id":"https://openalex.org/keywords/gigabit","display_name":"Gigabit","score":0.8605451583862305},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7461843490600586},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.520038366317749},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.489601194858551},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.453371524810791},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.38764122128486633},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29768288135528564},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.14456865191459656}],"concepts":[{"id":"https://openalex.org/C198306430","wikidata":"https://www.wikidata.org/wiki/Q51823","display_name":"Synchronous optical networking","level":2,"score":0.9236714839935303},{"id":"https://openalex.org/C21922175","wikidata":"https://www.wikidata.org/wiki/Q3105497","display_name":"Gigabit","level":2,"score":0.8605451583862305},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7461843490600586},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.520038366317749},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.489601194858551},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.453371524810791},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.38764122128486633},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29768288135528564},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.14456865191459656},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/glsv.1997.580404","is_oa":false,"landing_page_url":"https://doi.org/10.1109/glsv.1997.580404","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings Great Lakes Symposium on VLSI","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8500000238418579,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W148146455","https://openalex.org/W1525446828","https://openalex.org/W1533614470","https://openalex.org/W1557557193","https://openalex.org/W2098835507","https://openalex.org/W2123020143","https://openalex.org/W6631195062"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2488704204","https://openalex.org/W2319112762","https://openalex.org/W2148831653","https://openalex.org/W1510230419","https://openalex.org/W2141629831","https://openalex.org/W2296304881","https://openalex.org/W2075900773","https://openalex.org/W2109445684","https://openalex.org/W2081082331"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"an":[3],"output":[4,60],"buffer":[5,77],"which":[6],"converts":[7],"CMOS":[8,29],"into":[9],"ECL":[10],"levels,":[11],"and":[12,62],"a":[13,25,70,90],"brief":[14],"analysis":[15,49],"of":[16,89],"its":[17],"speed":[18,48,54],"performance.":[19],"The":[20,37,85],"structure":[21],"is":[22,33,40,55,69,87],"designed":[23],"in":[24],"0.8":[26],"/spl":[27,35],"mu/m":[28],"process":[30],"(effective":[31],"length":[32],"0.7":[34],"mu/m).":[36],"circuit":[38,86],"operation":[39],"based":[41],"on":[42],"current":[43],"source":[44],"switching.":[45],"In":[46],"the":[47,53,59,64,76],"we":[50],"show":[51],"that":[52,63],"severely":[56],"limited":[57],"by":[58],"load,":[61],"process,":[65],"for":[66,75],"common":[67],"applications,":[68],"secondary":[71],"factor.":[72],"Experimental":[73],"results":[74],"operating":[78],"at":[79],"1.4":[80],"Gbit/s":[81,92],"rate":[82],"are":[83],"shown.":[84],"part":[88],"1.2":[91],"SDH/SONET":[93],"system.":[94]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
