{"id":"https://openalex.org/W2069885283","doi":"https://doi.org/10.1109/globalsip.2013.6737140","title":"Selective decoding in associative memories based on Sparse-Clustered Networks","display_name":"Selective decoding in associative memories based on Sparse-Clustered Networks","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2069885283","doi":"https://doi.org/10.1109/globalsip.2013.6737140","mag":"2069885283"},"language":"en","primary_location":{"id":"doi:10.1109/globalsip.2013.6737140","is_oa":false,"landing_page_url":"https://doi.org/10.1109/globalsip.2013.6737140","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE Global Conference on Signal and Information Processing","raw_type":"proceedings-article"},"type":"article","indexed_in":["arxiv","crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/1308.6021","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048901169","display_name":"Hooman Jarollahi","orcid":null},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":true,"raw_author_name":"Hooman Jarollahi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec","Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049740452","display_name":"Naoya Onizawa","orcid":"https://orcid.org/0000-0002-4855-7081"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Naoya Onizawa","raw_affiliation_strings":["Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec","Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada","institution_ids":["https://openalex.org/I5023651"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091600002","display_name":"Warren J. Gross","orcid":"https://orcid.org/0000-0002-6226-6037"},"institutions":[{"id":"https://openalex.org/I5023651","display_name":"McGill University","ror":"https://ror.org/01pxwe438","country_code":"CA","type":"education","lineage":["https://openalex.org/I5023651"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Warren J. Gross","raw_affiliation_strings":["Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec","Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, McGill University, Montreal, Quebec","institution_ids":["https://openalex.org/I5023651"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC, Canada","institution_ids":["https://openalex.org/I5023651"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5048901169"],"corresponding_institution_ids":["https://openalex.org/I5023651"],"apc_list":null,"apc_paid":null,"fwci":1.9029,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.86082163,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1270","last_page":"1273"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.993399977684021,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9927999973297119,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9889000058174133,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8435938358306885},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.7593976259231567},{"id":"https://openalex.org/keywords/associative-property","display_name":"Associative property","score":0.7195127606391907},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6915290951728821},{"id":"https://openalex.org/keywords/content-addressable-memory","display_name":"Content-addressable memory","score":0.5822057127952576},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5698512196540833},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5345228314399719},{"id":"https://openalex.org/keywords/low-latency","display_name":"Low latency (capital markets)","score":0.44117119908332825},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4307297468185425},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3698427975177765},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3288518190383911},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3282013237476349},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.28315630555152893},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2715132534503937},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17928627133369446},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.16844642162322998}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8435938358306885},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.7593976259231567},{"id":"https://openalex.org/C159423971","wikidata":"https://www.wikidata.org/wiki/Q177251","display_name":"Associative property","level":2,"score":0.7195127606391907},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6915290951728821},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.5822057127952576},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5698512196540833},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5345228314399719},{"id":"https://openalex.org/C46637626","wikidata":"https://www.wikidata.org/wiki/Q6693015","display_name":"Low latency (capital markets)","level":2,"score":0.44117119908332825},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4307297468185425},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3698427975177765},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3288518190383911},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3282013237476349},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.28315630555152893},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2715132534503937},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17928627133369446},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.16844642162322998},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/globalsip.2013.6737140","is_oa":false,"landing_page_url":"https://doi.org/10.1109/globalsip.2013.6737140","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE Global Conference on Signal and Information Processing","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:1308.6021","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1308.6021","pdf_url":"https://arxiv.org/pdf/1308.6021","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.765.9243","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.765.9243","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://arxiv.org/pdf/1308.6021.pdf","raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:1308.6021","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1308.6021","pdf_url":"https://arxiv.org/pdf/1308.6021","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"text"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1977602574","https://openalex.org/W2037808679","https://openalex.org/W2086523057","https://openalex.org/W2121160181","https://openalex.org/W2128084896","https://openalex.org/W2163491516","https://openalex.org/W2293063825"],"related_works":["https://openalex.org/W2120447654","https://openalex.org/W2977179488","https://openalex.org/W2144453115","https://openalex.org/W279701215","https://openalex.org/W2107697999","https://openalex.org/W1984090010","https://openalex.org/W1902246517","https://openalex.org/W2140603008","https://openalex.org/W3145837419","https://openalex.org/W4399169349"],"abstract_inverted_index":{"Associative":[0],"memories":[1,38],"are":[2,50,59],"structures":[3],"that":[4,44,64,82],"can":[5],"retrieve":[6],"previously":[7],"stored":[8],"information":[9],"given":[10],"a":[11,33,66,74,84,91,106],"partial":[12],"input":[13],"pattern":[14],"instead":[15],"of":[16,36,78,118,130],"an":[17],"explicit":[18],"address":[19],"as":[20,88,90,96],"in":[21,110],"indexed":[22],"memories.":[23],"A":[24],"few":[25,67,131],"hardware":[26,76],"approaches":[27],"have":[28],"recently":[29],"been":[30,103],"introduced":[31],"for":[32,52],"new":[34,75,85],"family":[35],"associative":[37],"based":[39],"on":[40],"Sparse-Clustered":[41],"Networks":[42],"(SCN)":[43],"show":[45],"attractive":[46],"features.":[47],"These":[48],"architectures":[49],"suitable":[51],"implementations":[53],"with":[54,122,127],"low":[55],"retrieval":[56],"latency,":[57],"but":[58,126],"limited":[60],"to":[61,95],"small":[62],"networks":[63],"store":[65],"hundred":[68],"data":[69,136],"entries.":[70],"In":[71],"this":[72],"paper,":[73],"architecture":[77],"SCNs":[79],"is":[80],"proposed":[81],"features":[83],"data-storage":[86],"technique":[87],"well":[89],"method":[92],"we":[93],"refer":[94],"Selective":[97],"Decoding":[98],"(SD-SCN).":[99],"The":[100],"SD-SCN":[101],"has":[102],"implemented":[104],"using":[105],"similar":[107],"FPGA":[108],"used":[109],"the":[111,128],"previous":[112],"efforts":[113],"and":[114],"achieves":[115],"two":[116],"orders":[117],"magnitude":[119],"higher":[120],"capacity,":[121],"no":[123],"error-performance":[124],"penalty":[125],"cost":[129],"extra":[132],"clock":[133],"cycles":[134],"per":[135],"access.":[137]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2014,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}