{"id":"https://openalex.org/W4406265955","doi":"https://doi.org/10.1109/gcce62371.2024.10760930","title":"MTST: A Multi-Task Scheduling Transformer Accelerator for Edge Computing","display_name":"MTST: A Multi-Task Scheduling Transformer Accelerator for Edge Computing","publication_year":2024,"publication_date":"2024-10-29","ids":{"openalex":"https://openalex.org/W4406265955","doi":"https://doi.org/10.1109/gcce62371.2024.10760930"},"language":"en","primary_location":{"id":"doi:10.1109/gcce62371.2024.10760930","is_oa":false,"landing_page_url":"https://doi.org/10.1109/gcce62371.2024.10760930","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 13th Global Conference on Consumer Electronics (GCCE)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102536475","display_name":"Zongcheng Yue","orcid":null},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Zongcheng Yue","raw_affiliation_strings":["The University of Auckland,School of Computer Science,New Zealand"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Auckland,School of Computer Science,New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111335417","display_name":"Dongwei Yan","orcid":null},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Dongwei Yan","raw_affiliation_strings":["The University of Auckland,School of Computer Science,New Zealand"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Auckland,School of Computer Science,New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5048831808","display_name":"Ran Wu","orcid":"https://orcid.org/0000-0002-1031-229X"},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ran Wu","raw_affiliation_strings":["Harbin Institute of Technology,School of Computer Science,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Harbin Institute of Technology,School of Computer Science,China","institution_ids":["https://openalex.org/I204983213"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060979563","display_name":"Longyu Ma","orcid":"https://orcid.org/0000-0002-3350-004X"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Longyu Ma","raw_affiliation_strings":["The University of Auckland,School of Computer Science,New Zealand"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Auckland,School of Computer Science,New Zealand","institution_ids":["https://openalex.org/I154130895"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025582832","display_name":"Chiu\u2010Wing Sham","orcid":"https://orcid.org/0000-0001-7007-6746"},"institutions":[{"id":"https://openalex.org/I154130895","display_name":"University of Auckland","ror":"https://ror.org/03b94tp07","country_code":"NZ","type":"education","lineage":["https://openalex.org/I154130895"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Chiu-Wing Sham","raw_affiliation_strings":["The University of Auckland,School of Computer Science,New Zealand"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The University of Auckland,School of Computer Science,New Zealand","institution_ids":["https://openalex.org/I154130895"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":2.234,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.89241191,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1394","last_page":"1395"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9621999859809875,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9621999859809875,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9308000206947327,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7523846626281738},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.500464916229248},{"id":"https://openalex.org/keywords/transformer","display_name":"Transformer","score":0.4959147870540619},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4326234757900238},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.4276672601699829},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4261574149131775},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3724000155925751},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32077479362487793},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1437269151210785},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09974586963653564},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.06906121969223022}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7523846626281738},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.500464916229248},{"id":"https://openalex.org/C66322947","wikidata":"https://www.wikidata.org/wiki/Q11658","display_name":"Transformer","level":3,"score":0.4959147870540619},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4326234757900238},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.4276672601699829},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4261574149131775},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3724000155925751},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32077479362487793},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1437269151210785},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09974586963653564},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.06906121969223022},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/gcce62371.2024.10760930","is_oa":false,"landing_page_url":"https://doi.org/10.1109/gcce62371.2024.10760930","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE 13th Global Conference on Consumer Electronics (GCCE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7200000286102295,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W1809394610","https://openalex.org/W2128410848","https://openalex.org/W2118368532","https://openalex.org/W2014085448","https://openalex.org/W2102390841","https://openalex.org/W3047653192","https://openalex.org/W2096289371","https://openalex.org/W2126232624","https://openalex.org/W2434525066","https://openalex.org/W3140149227"],"abstract_inverted_index":{"Transformer":[0,24,52],"is":[1],"pivotal":[2],"in":[3,11],"Large":[4],"Language":[5],"Models":[6],"(LLMs),":[7],"enabling":[8],"superior":[9],"performance":[10,125],"language":[12],"tasks.":[13],"However,":[14],"the":[15,91,108,115,120],"abundance":[16],"of":[17,51,96],"parameters":[18],"poses":[19],"a":[20,57,64,75,79,99],"challenge":[21],"for":[22,29,53,103],"deploying":[23],"on":[25,110],"resource-constrained":[26],"edge":[27,30,54],"devices":[28],"computing,":[31,55],"such":[32],"as":[33,78],"Field-Programmable":[34],"Gate":[35],"Arrays":[36],"(FPGAs).":[37],"To":[38,62],"overcome":[39],"this":[40],"limitation,":[41],"we":[42,73],"present":[43],"an":[44],"FPGA-based":[45],"architecture":[46,109],"that":[47,119],"enables":[48],"high-performance":[49],"deployment":[50],"incorporating":[56],"unique":[58],"multitask":[59],"ping-pong":[60],"scheme.":[61],"strike":[63],"balance":[65],"between":[66],"computing":[67],"efficiency":[68],"and":[69,94],"logic":[70],"resource":[71,101],"consumption,":[72],"adopt":[74],"systolic":[76],"array":[77],"reusable":[80],"processing":[81],"engine":[82],"(PE),":[83],"employing":[84],"meticulous":[85],"space":[86],"exploration":[87],"techniques":[88],"to":[89],"determine":[90],"optimal":[92],"quantity":[93],"dimensions":[95],"PEs":[97],"within":[98],"given":[100],"budget":[102],"our":[104],"architecture.":[105],"We":[106],"implement":[107],"ZCU":[111],"102":[112],"FPGA":[113],"platform,":[114],"experimental":[116],"results":[117],"illustrate":[118],"proposed":[121],"accelerator":[122],"achieves":[123],"state-of-the-art":[124],"while":[126],"consuming":[127],"fewer":[128],"resources.":[129]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
