{"id":"https://openalex.org/W2278562982","doi":"https://doi.org/10.1109/gcce.2015.7398610","title":"Block-based SRAM architecture and thermal-aware memory mappings for three-dimensional channel decoding systems","display_name":"Block-based SRAM architecture and thermal-aware memory mappings for three-dimensional channel decoding systems","publication_year":2015,"publication_date":"2015-10-01","ids":{"openalex":"https://openalex.org/W2278562982","doi":"https://doi.org/10.1109/gcce.2015.7398610","mag":"2278562982"},"language":"en","primary_location":{"id":"doi:10.1109/gcce.2015.7398610","is_oa":false,"landing_page_url":"https://doi.org/10.1109/gcce.2015.7398610","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 4th Global Conference on Consumer Electronics (GCCE)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103056563","display_name":"Shu-Yen Lin","orcid":"https://orcid.org/0000-0002-0537-9369"},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Shu-Yen Lin","raw_affiliation_strings":["Department of Electrical Engineering","Innovation Center for Big Data and Digital Convergence, Yuan Ze University, Jungli, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering","institution_ids":[]},{"raw_affiliation_string":"Innovation Center for Big Data and Digital Convergence, Yuan Ze University, Jungli, Taiwan, R.O.C","institution_ids":["https://openalex.org/I99908691"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011289357","display_name":"Cheng-Hung Lin","orcid":"https://orcid.org/0000-0003-0044-3840"},"institutions":[{"id":"https://openalex.org/I99908691","display_name":"Yuan Ze University","ror":"https://ror.org/01fv1ds98","country_code":"TW","type":"education","lineage":["https://openalex.org/I99908691"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng-Hung Lin","raw_affiliation_strings":["Department of Electrical Engineering","Innovation Center for Big Data and Digital Convergence, Yuan Ze University, Jungli, Taiwan, R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering","institution_ids":[]},{"raw_affiliation_string":"Innovation Center for Big Data and Digital Convergence, Yuan Ze University, Jungli, Taiwan, R.O.C","institution_ids":["https://openalex.org/I99908691"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015142747","display_name":"Ho-Yun Su","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ho-Yun Su","raw_affiliation_strings":["Department of Electrical Engineering"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5103056563"],"corresponding_institution_ids":["https://openalex.org/I99908691"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1378751,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"19","issue":null,"first_page":"277","last_page":"278"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8678265810012817},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.793074369430542},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.7796831130981445},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7173159718513489},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5821521282196045},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5520529747009277},{"id":"https://openalex.org/keywords/read-write-memory","display_name":"Read-write memory","score":0.5332446098327637},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.5234507918357849},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4162946343421936},{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.41592273116111755},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4115235209465027},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.40970367193222046},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.39626187086105347},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3229287266731262},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.27589133381843567},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2604120373725891},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17488661408424377},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10865515470504761},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.05866602063179016}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8678265810012817},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.793074369430542},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.7796831130981445},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7173159718513489},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5821521282196045},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5520529747009277},{"id":"https://openalex.org/C2776321774","wikidata":"https://www.wikidata.org/wiki/Q891131","display_name":"Read-write memory","level":3,"score":0.5332446098327637},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.5234507918357849},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4162946343421936},{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.41592273116111755},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4115235209465027},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.40970367193222046},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.39626187086105347},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3229287266731262},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.27589133381843567},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2604120373725891},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17488661408424377},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10865515470504761},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.05866602063179016},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C46141821","wikidata":"https://www.wikidata.org/wiki/Q209402","display_name":"Nuclear magnetic resonance","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/gcce.2015.7398610","is_oa":false,"landing_page_url":"https://doi.org/10.1109/gcce.2015.7398610","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 4th Global Conference on Consumer Electronics (GCCE)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Sustainable cities and communities","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/11"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1825164805","https://openalex.org/W1993572515","https://openalex.org/W2022186439","https://openalex.org/W2081977072","https://openalex.org/W2084810817","https://openalex.org/W2125213532","https://openalex.org/W2149513153","https://openalex.org/W2154857344","https://openalex.org/W2170300630","https://openalex.org/W3141627443","https://openalex.org/W6648594951","https://openalex.org/W6656041504","https://openalex.org/W6671829649"],"related_works":["https://openalex.org/W1909296377","https://openalex.org/W2089002058","https://openalex.org/W3185029353","https://openalex.org/W3116379964","https://openalex.org/W2766443086","https://openalex.org/W2793465010","https://openalex.org/W1985899440","https://openalex.org/W2915176329","https://openalex.org/W2967161359","https://openalex.org/W1586455594"],"abstract_inverted_index":{"In":[0,66],"this":[1,41],"work,":[2],"the":[3,9,16,29,36,43,51,55,60,64,69,81],"3D":[4,17,22],"block-based":[5,23],"SRAM":[6,24],"architecture":[7],"and":[8,58],"thermal-aware":[10,44],"memory":[11,30,37,45],"mappings":[12,46],"are":[13,47],"proposed":[14,26],"for":[15],"channel":[18],"decoding":[19],"systems.":[20],"The":[21],"is":[25],"by":[27,49,75],"analyzing":[28],"utilization":[31],"with":[32],"different":[33],"sizes":[34],"of":[35,54,63],"elements.":[38],"Based":[39],"on":[40],"architecture,":[42],"discussed":[48],"minimizing":[50],"vertical":[52],"stacking":[53],"active":[56],"MEs":[57],"avoiding":[59],"successive":[61],"access":[62],"MEs.":[65],"our":[67],"experiments,":[68],"peak":[70],"temperature":[71],"can":[72],"be":[73],"reduced":[74],"2.6\u00b0C":[76],"~":[77],"22.2\u00b0C":[78],"compared":[79],"to":[80],"worst":[82],"mappings.":[83]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}