{"id":"https://openalex.org/W2786345203","doi":"https://doi.org/10.1109/fpt.2017.8280158","title":"Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA","display_name":"Calling hardware procedures in a reconfigurable accelerator using RPC-FPGA","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2786345203","doi":"https://doi.org/10.1109/fpt.2017.8280158","mag":"2786345203"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2017.8280158","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2017.8280158","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Conference on Field Programmable Technology (ICFPT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045234765","display_name":"Erik D\u2019Hollander","orcid":"https://orcid.org/0009-0003-3009-7106"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":true,"raw_author_name":"Erik H. D'Hollander","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University, Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053956076","display_name":"Bruno Chevalier","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Bruno Chevalier","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University, Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080181390","display_name":"Koen De Bosschere","orcid":"https://orcid.org/0000-0002-6338-4297"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Koen De Bosschere","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University, Ghent, Belgium"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5045234765"],"corresponding_institution_ids":["https://openalex.org/I32597200"],"apc_list":null,"apc_paid":null,"fwci":0.6937,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.72146066,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"271","last_page":"274"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8923982381820679},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7915098071098328},{"id":"https://openalex.org/keywords/nested-loop-join","display_name":"Nested loop join","score":0.570572018623352},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5422481298446655},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.5366721749305725},{"id":"https://openalex.org/keywords/fpga-prototype","display_name":"FPGA prototype","score":0.5326029658317566},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5313169360160828},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5086556077003479},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5027456283569336},{"id":"https://openalex.org/keywords/hardware-acceleration","display_name":"Hardware acceleration","score":0.46831589937210083},{"id":"https://openalex.org/keywords/remote-procedure-call","display_name":"Remote procedure call","score":0.41180646419525146},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.29744622111320496},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.25021329522132874}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8923982381820679},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7915098071098328},{"id":"https://openalex.org/C1306188","wikidata":"https://www.wikidata.org/wiki/Q4060687","display_name":"Nested loop join","level":2,"score":0.570572018623352},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5422481298446655},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.5366721749305725},{"id":"https://openalex.org/C203864433","wikidata":"https://www.wikidata.org/wiki/Q5426992","display_name":"FPGA prototype","level":3,"score":0.5326029658317566},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5313169360160828},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5086556077003479},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5027456283569336},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.46831589937210083},{"id":"https://openalex.org/C172086080","wikidata":"https://www.wikidata.org/wiki/Q62270","display_name":"Remote procedure call","level":2,"score":0.41180646419525146},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.29744622111320496},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.25021329522132874},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpt.2017.8280158","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2017.8280158","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Conference on Field Programmable Technology (ICFPT)","raw_type":"proceedings-article"},{"id":"pmh:oai:archive.ugent.be:8551074","is_oa":false,"landing_page_url":"http://hdl.handle.net/1854/LU-8551074","pdf_url":null,"source":{"id":"https://openalex.org/S4306400478","display_name":"Ghent University Academic Bibliography (Ghent University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I32597200","host_organization_name":"Ghent University","host_organization_lineage":["https://openalex.org/I32597200"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISBN: 978-1-5386-2656-6","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.4399999976158142,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1930998954","https://openalex.org/W1982516565","https://openalex.org/W2125703639","https://openalex.org/W2167664807","https://openalex.org/W2517408061","https://openalex.org/W2575866180"],"related_works":["https://openalex.org/W2113648965","https://openalex.org/W3115530580","https://openalex.org/W2622392763","https://openalex.org/W2390254310","https://openalex.org/W3209622410","https://openalex.org/W2580284127","https://openalex.org/W4214905828","https://openalex.org/W4387486096","https://openalex.org/W2099626978","https://openalex.org/W2148243454"],"abstract_inverted_index":{"RPC-FPGA":[0,80,124],"is":[1,49,60,120,132],"a":[2,33,102,125,135],"remote":[3],"procedure":[4,35],"call":[5,32],"protocol":[6,48],"implementation":[7,21],"of":[8,25,79,110,128,139],"the":[9,23,38,41,44,73,95,107,111,115,118],"Open":[10],"Network":[11],"Computing":[12],"ONC-RPC":[13],"specification":[14],"for":[15,91],"use":[16],"in":[17,72,94,101],"FPGA":[18,87,119],"accelerators.":[19],"The":[20,46,76],"involves":[22],"generation":[24],"High-Level":[26],"Synthesis":[27],"(HLS)":[28],"interface":[29,113],"stubs":[30],"to":[31,51,62,130],"hardware":[34,82,98],"and":[36,43,106,117,146],"stream":[37],"data":[39],"between":[40,114],"processor":[42,116],"FPGA.":[45],"RPC":[47],"extended":[50],"accept":[52],"variable-length":[53],"arrays":[54,70],"with":[55,141],"multiple":[56,97],"dimensions.":[57],"This":[58],"extension":[59],"required":[61],"support":[63],"optimizing":[64],"nested":[65],"loop":[66],"transformations":[67],"on":[68,85,134],"multidimensional":[69],"stored":[71],"reconfigurable":[74],"logic.":[75],"major":[77],"benefits":[78],"are:":[81],"procedures":[83,99],"running":[84],"an":[86],"accelerator":[88],"become":[89],"accessible":[90],"any":[92],"client":[93],"network,":[96],"run":[100],"truly":[103],"parallel":[104],"fashion":[105],"development":[108],"time":[109],"communication":[112],"largely":[121],"reduced.":[122],"Using":[123],"speedup":[126],"gain":[127],"17":[129],"20":[131],"demonstrated":[133],"square":[136],"matrix":[137],"multiplication":[138],"N=4096":[140],"network":[142],"speeds":[143],"100":[144],"Mbps":[145],"1":[147],"Gbps":[148],"respectively.":[149]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-05-05T08:41:31.759640","created_date":"2025-10-10T00:00:00"}