{"id":"https://openalex.org/W2785757036","doi":"https://doi.org/10.1109/fpt.2017.8280145","title":"An open source PXIe ecosystem based on FPGA modules","display_name":"An open source PXIe ecosystem based on FPGA modules","publication_year":2017,"publication_date":"2017-12-01","ids":{"openalex":"https://openalex.org/W2785757036","doi":"https://doi.org/10.1109/fpt.2017.8280145","mag":"2785757036"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2017.8280145","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2017.8280145","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Conference on Field Programmable Technology (ICFPT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002601716","display_name":"Andrew Ang","orcid":null},"institutions":[{"id":"https://openalex.org/I41156924","display_name":"Victoria University of Wellington","ror":"https://ror.org/0040r6f76","country_code":"NZ","type":"education","lineage":["https://openalex.org/I41156924"]}],"countries":["NZ"],"is_corresponding":true,"raw_author_name":"Andrew Ang","raw_affiliation_strings":["School of Engineering and Computer Science, Victoria University of Wellington, Wellington, New Zealand"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Computer Science, Victoria University of Wellington, Wellington, New Zealand","institution_ids":["https://openalex.org/I41156924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017489215","display_name":"Matt Bourne","orcid":null},"institutions":[{"id":"https://openalex.org/I41156924","display_name":"Victoria University of Wellington","ror":"https://ror.org/0040r6f76","country_code":"NZ","type":"education","lineage":["https://openalex.org/I41156924"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Matt Bourne","raw_affiliation_strings":["School of Engineering and Computer Science, Victoria University of Wellington, Wellington, New Zealand"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Computer Science, Victoria University of Wellington, Wellington, New Zealand","institution_ids":["https://openalex.org/I41156924"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080647520","display_name":"Robin Dykstra","orcid":"https://orcid.org/0000-0003-0119-5674"},"institutions":[{"id":"https://openalex.org/I41156924","display_name":"Victoria University of Wellington","ror":"https://ror.org/0040r6f76","country_code":"NZ","type":"education","lineage":["https://openalex.org/I41156924"]}],"countries":["NZ"],"is_corresponding":false,"raw_author_name":"Robin Dykstra","raw_affiliation_strings":["School of Engineering and Computer Science, Victoria University of Wellington, Wellington, New Zealand"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Computer Science, Victoria University of Wellington, Wellington, New Zealand","institution_ids":["https://openalex.org/I41156924"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5002601716"],"corresponding_institution_ids":["https://openalex.org/I41156924"],"apc_list":null,"apc_paid":null,"fwci":0.2012,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.56803238,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"219","last_page":"222"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9937000274658203,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9883000254631042,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pci-express","display_name":"PCI Express","score":0.9505312442779541},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.718277633190155},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6800435781478882},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.6775017380714417},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6763020157814026},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.5711633563041687},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5303804278373718},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.515687108039856},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4726095497608185},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.38337278366088867}],"concepts":[{"id":"https://openalex.org/C64270927","wikidata":"https://www.wikidata.org/wiki/Q206924","display_name":"PCI Express","level":3,"score":0.9505312442779541},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.718277633190155},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6800435781478882},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.6775017380714417},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6763020157814026},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.5711633563041687},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5303804278373718},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.515687108039856},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4726095497608185},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.38337278366088867},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpt.2017.8280145","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2017.8280145","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 International Conference on Field Programmable Technology (ICFPT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1583776219","https://openalex.org/W2125703639","https://openalex.org/W2516125595","https://openalex.org/W2557866199","https://openalex.org/W6730131305"],"related_works":["https://openalex.org/W4385894176","https://openalex.org/W2347371119","https://openalex.org/W2612768808","https://openalex.org/W3131402800","https://openalex.org/W2388965158","https://openalex.org/W2366201982","https://openalex.org/W2808480228","https://openalex.org/W2593071546","https://openalex.org/W2805641962","https://openalex.org/W1564576805"],"abstract_inverted_index":{"PXIe":[0,35,63,145],"is":[1,36,102],"a":[2,29,71,144,149,155,163,173],"modular":[3,13],"instrumentation":[4],"standard":[5],"used":[6],"in":[7,113],"building":[8],"electronic":[9],"test":[10],"equipment":[11],"and":[12,43,85,158,161,176],"laboratory":[14],"instruments.":[15],"Built":[16],"on":[17,130,154,167,172],"the":[18,44,91,97],"PCIe":[19,72,92,112],"bus":[20],"standard,":[21],"it":[22],"provides":[23],"high-speed":[24],"transfer":[25],"rates":[26],"suitable":[27],"for":[28,53,76,90,185],"wide":[30],"range":[31],"of":[32,70,104,126,142],"applications.":[33],"However,":[34],"inherently":[37],"complex,":[38],"usually":[39],"contains":[40],"proprietary":[41],"IP":[42,74],"solutions":[45],"provided":[46],"by":[47,96],"vendors":[48],"are":[49],"often":[50],"prohibitively":[51],"expensive":[52],"some":[54],"projects.":[55],"To":[56,116],"overcome":[57],"these":[58],"barriers,":[59],"an":[60,81,168,179],"open":[61],"source":[62],"ecosystem":[64],"has":[65,123],"been":[66,124],"developed.":[67],"This":[68],"consists":[69,141],"I/O":[73],"block":[75],"peripheral":[77,164],"boards":[78],"together":[79],"with":[80],"associated":[82],"device":[83],"driver":[84],"application":[86],"programmers":[87],"interface":[88],"(API)":[89],"root":[93],"complex":[94],"hosted":[95],"system":[98,106,119,146],"controller.":[99],"The":[100],"design":[101],"capable":[103],"performing":[105],"controller":[107,147],"initiated":[108],"DMA":[109],"transfers":[110],"over":[111],"both":[114],"directions.":[115],"further":[117,186],"simplify":[118],"development,":[120],"much":[121],"use":[122],"made":[125],"Xilinx":[127],"based":[128,151,166],"System":[129],"Module":[131],"(SOM)":[132],"units":[133],"available":[134],"from":[135],"several":[136],"vendors.":[137],"Our":[138],"example":[139],"solution":[140],"(a)":[143],"housing":[148],"Zynq":[150],"SOM":[152,170],"mounted":[153,171],"carrier":[156,174],"board":[157,165,175],"running":[159],"Linux":[160],"(b)":[162],"Artix":[169],"also":[177],"hosting":[178],"FPGA":[180],"Mezzanine":[181],"Card":[182],"(FMC)":[183],"connector":[184],"expansion.":[187]},"counts_by_year":[{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}