{"id":"https://openalex.org/W2059237994","doi":"https://doi.org/10.1109/fpt.2013.6718407","title":"A defect-tolerant cluster in a mesh SRAM-based FPGA","display_name":"A defect-tolerant cluster in a mesh SRAM-based FPGA","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2059237994","doi":"https://doi.org/10.1109/fpt.2013.6718407","mag":"2059237994"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2013.6718407","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2013.6718407","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Field-Programmable Technology (FPT)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035916982","display_name":"Arwa Ben Dhia","orcid":null},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Arwa Ben Dhia","raw_affiliation_strings":["TELECOM ParisTech, Institut TELECOM, Paris, France","T\u00e9l\u00e9com ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TELECOM ParisTech, Institut TELECOM, Paris, France","institution_ids":["https://openalex.org/I12356871"]},{"raw_affiliation_string":"T\u00e9l\u00e9com ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)","institution_ids":["https://openalex.org/I12356871"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050544831","display_name":"Saif Ur Rehman","orcid":"https://orcid.org/0000-0002-3142-3810"},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Saif Ur Rehman","raw_affiliation_strings":["Grenoble-Alpes University, TIMA Laboratory, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Grenoble-Alpes University, TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I899635006","https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036847544","display_name":"Adrien Blanchardon","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Adrien Blanchardon","raw_affiliation_strings":["LIP6, Pierre and Marie Curie University, Paris, France","CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIP6, Pierre and Marie Curie University, Paris, France","institution_ids":["https://openalex.org/I39804081"]},{"raw_affiliation_string":"CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018022196","display_name":"L\u00edrida Naviner","orcid":"https://orcid.org/0000-0002-6320-4153"},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Lirida Naviner","raw_affiliation_strings":["TELECOM ParisTech, Institut TELECOM, Paris, France","T\u00e9l\u00e9com ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TELECOM ParisTech, Institut TELECOM, Paris, France","institution_ids":["https://openalex.org/I12356871"]},{"raw_affiliation_string":"T\u00e9l\u00e9com ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)","institution_ids":["https://openalex.org/I12356871"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108093269","display_name":"Mounir Benabdenbi","orcid":"https://orcid.org/0000-0001-9586-3009"},"institutions":[{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I899635006","display_name":"Universit\u00e9 Grenoble Alpes","ror":"https://ror.org/02rx3b187","country_code":"FR","type":"education","lineage":["https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Mounir Benabdenbi","raw_affiliation_strings":["Grenoble-Alpes University, TIMA Laboratory, Grenoble, France","TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Grenoble-Alpes University, TIMA Laboratory, Grenoble, France","institution_ids":["https://openalex.org/I899635006","https://openalex.org/I4210087012"]},{"raw_affiliation_string":"TIMA - Techniques de l'Informatique et de la Micro\u00e9lectronique pour l'Architecture des syst\u00e8mes int\u00e9gr\u00e9s (46 avenue F\u00e9lix Viallet\r\n38031 GRENOBLE Cedex 1 - France)","institution_ids":["https://openalex.org/I4210087012"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110226823","display_name":"Roselyne Chotin-Avot","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Roselyne Chotin-Avot","raw_affiliation_strings":["LIP6, Pierre and Marie Curie University, Paris, France","CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIP6, Pierre and Marie Curie University, Paris, France","institution_ids":["https://openalex.org/I39804081"]},{"raw_affiliation_string":"CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108405631","display_name":"Habib Mehrez","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Habib Mehrez","raw_affiliation_strings":["LIP6, Pierre and Marie Curie University, Paris, France","CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIP6, Pierre and Marie Curie University, Paris, France","institution_ids":["https://openalex.org/I39804081"]},{"raw_affiliation_string":"CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040282351","display_name":"Emna Amouri","orcid":"https://orcid.org/0000-0003-2107-3658"},"institutions":[{"id":"https://openalex.org/I12356871","display_name":"T\u00e9l\u00e9com Paris","ror":"https://ror.org/01naq7912","country_code":"FR","type":"education","lineage":["https://openalex.org/I12356871","https://openalex.org/I205703379","https://openalex.org/I4210145102"]},{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Emna Amouri","raw_affiliation_strings":["LIP6, Pierre and Marie Curie University, Paris, France","T\u00e9l\u00e9com ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)","CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LIP6, Pierre and Marie Curie University, Paris, France","institution_ids":["https://openalex.org/I39804081"]},{"raw_affiliation_string":"T\u00e9l\u00e9com ParisTech (46 rue Barrault 75634 Paris Cedex 13 - France)","institution_ids":["https://openalex.org/I12356871"]},{"raw_affiliation_string":"CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111822030","display_name":"Zied Marrakchi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210125396","display_name":"APEX Technologies (France)","ror":"https://ror.org/02wzm7472","country_code":"FR","type":"company","lineage":["https://openalex.org/I4210125396"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Zied Marrakchi","raw_affiliation_strings":["FLEXRAS Technologies, Saint-Denis, France","CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FLEXRAS Technologies, Saint-Denis, France","institution_ids":["https://openalex.org/I4210125396"]},{"raw_affiliation_string":"CIAN - Circuits Int\u00e9gr\u00e9s Num\u00e9riques et Analogiques (France)","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":9,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.4801,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.70097728,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"434","last_page":"437"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6296157836914062},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6223593354225159},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.6172661781311035},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.6089751720428467},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.6084927320480347},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.603693425655365},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5514175891876221},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4882235825061798},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.4823262393474579},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.454642653465271},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.43418365716934204},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4333048164844513},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4127037525177002},{"id":"https://openalex.org/keywords/programmable-logic-array","display_name":"Programmable logic array","score":0.4119677245616913},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35545670986175537},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3068087100982666},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.26560190320014954},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22719261050224304},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.19995468854904175},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.10875740647315979}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6296157836914062},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6223593354225159},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.6172661781311035},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.6089751720428467},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.6084927320480347},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.603693425655365},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5514175891876221},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4882235825061798},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.4823262393474579},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.454642653465271},{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.43418365716934204},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4333048164844513},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4127037525177002},{"id":"https://openalex.org/C182322920","wikidata":"https://www.wikidata.org/wiki/Q2112217","display_name":"Programmable logic array","level":3,"score":0.4119677245616913},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35545670986175537},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3068087100982666},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.26560190320014954},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22719261050224304},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.19995468854904175},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.10875740647315979},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/fpt.2013.6718407","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2013.6718407","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Field-Programmable Technology (FPT)","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-00987365v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00987365","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Conference on Field-Programmable Technology (FPT), Dec 2013, Kyoto, Japan. pp.434-437, ⟨10.1109/FPT.2013.6718407⟩","raw_type":"Conference papers"},{"id":"pmh:oai:HAL:hal-01062073v1","is_oa":false,"landing_page_url":"https://imt.hal.science/hal-01062073","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"International Conference on Field-Programmable Technology (ICFPT), Dec 2013, Kyoto, Japan. pp.434-437","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G5665028823","display_name":null,"funder_award_id":"ANR 11","funder_id":"https://openalex.org/F4320320883","funder_display_name":"Agence Nationale de la Recherche"}],"funders":[{"id":"https://openalex.org/F4320320883","display_name":"Agence Nationale de la Recherche","ror":"https://ror.org/00rbzpz17"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W156271197","https://openalex.org/W1523051745","https://openalex.org/W1603523129","https://openalex.org/W2031459809","https://openalex.org/W2040166817","https://openalex.org/W2068418208","https://openalex.org/W2108967709","https://openalex.org/W2110864115","https://openalex.org/W2112080352","https://openalex.org/W2116094656","https://openalex.org/W2124334694","https://openalex.org/W2540089678"],"related_works":["https://openalex.org/W2135636985","https://openalex.org/W1533253004","https://openalex.org/W2127580684","https://openalex.org/W2118828191","https://openalex.org/W2139569078","https://openalex.org/W2073513347","https://openalex.org/W2120397377","https://openalex.org/W4252227487","https://openalex.org/W3143008962","https://openalex.org/W2151927748"],"abstract_inverted_index":{"In":[0,27],"this":[1],"paper,":[2],"we":[3],"propose":[4],"the":[5,21,28,35,48,62,82,101,118,128,135,138,155],"implementation":[6],"of":[7,50,81,94,112,120,130,137,149],"multiple":[8],"defect-tolerant":[9],"techniques":[10,16],"on":[11,134],"an":[12],"SRAM-based":[13],"FPGA.":[14],"These":[15],"include":[17],"redundancy":[18,31,67],"at":[19,34,47,61],"both":[20],"logic":[22,29,104,121],"block":[23,122],"and":[24,57,115,123,154],"intra-cluster":[25,84,124],"interconnect.":[26],"block,":[30],"is":[32,40,68,88,144],"implemented":[33],"multiplexer":[36],"level.":[37],"Its":[38],"efficiency":[39],"analyzed":[41],"by":[42,91],"injecting":[43],"a":[44,51,109],"single":[45],"defect":[46],"output":[49],"multiplexer,":[52],"considering":[53],"all":[54],"possible":[55],"locations":[56],"input":[58],"combinations.":[59],"While":[60],"interconnect":[63,85,125],"level,":[64],"fine":[65],"grain":[66],"introduced":[69],"which":[70],"not":[71],"only":[72],"bypasses":[73],"defects":[74,143],"but":[75],"also":[76,145],"increases":[77],"routability.":[78],"Taking":[79],"advantage":[80],"sparse":[83],"structures,":[86],"routability":[87],"further":[89],"improved":[90],"efficient":[92],"distribution":[93],"feedback":[95],"paths":[96],"allowing":[97],"more":[98],"flexibility":[99],"in":[100,117,147],"connections":[102],"among":[103],"blocks.":[105],"Emulation":[106],"results":[107],"show":[108],"significant":[110],"improvement":[111],"about":[113],"15%":[114],"34%":[116],"robustness":[119],"respectively.":[126],"Furthermore,":[127],"impact":[129],"these":[131],"hardening":[132],"schemes":[133],"testability":[136],"FPGA":[139],"cluster":[140],"for":[141],"manufacturing":[142],"investigated":[146],"terms":[148],"maximum":[150],"achievable":[151],"fault":[152],"coverage":[153],"respective":[156],"cost.":[157]},"counts_by_year":[{"year":2014,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}